TI's Sitara AM3352 processor with up to 1 GHz and rich peripheral resources
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With the increasing number of terminal devices and the growing demand for large-scale data exchange, data concentrators will face new requirements and challenges in terms of performance and interfaces. Therefore, when selecting a core processor unit for a data concentrator, it is necessary to consider its ability to support various communication interfaces and provide reliable and accurate data processing.
Multi-interface support for power grid communication
Data concentrators typically require powerful Arm processors with multiple integrated peripherals to communicate with various end devices such as electricity, gas and water meters or any other type of monitoring equipment in the grid infrastructure.
RS485 is a widely used communication standard and is widely used in data concentrators. Therefore, the support of multiple UART (Universal Asynchronous Receiver/Transmitter) ports should be considered when designing and selecting. In addition to RS485, Ethernet is a more efficient and reliable means of communication that can quickly update power grid data to the control center or cloud server in real time, and is becoming more and more commonly used in certain fields. In addition, Bluetooth Low Energy (BLE) has become increasingly popular due to its wireless connectivity and good scalability due to fewer restrictions on the number of terminals. All of these communication protocols may become key features of current or next-generation designs, so this will also bring greater challenges to processor selection, peripheral considerations, and software operating systems. Especially when wireless communications such as BLE bring software development tasks such as stack porting, it is particularly important to have a mature and well-supported software operating system (such as Linux) to help easily port BLE or other required stacks.
The Sitara AM3352 processor shown in Figure 1 has very rich interface resources (6 UARTs, 2 Ethernet ports, 3 SPIs), uses mainline Linux, and has extensive community support for software development. It can meet various interface requirements of data concentrators and has good scalability, making it an excellent choice for concentrator platforms.
Figure 1: Sitara Arm Cortex-A8 processor
Improving power grid monitoring efficiency
In order to obtain timely updates on the state of the power grid and ensure the efficiency of real-time monitoring of the power grid, the industry has an increasing demand for real-time communication. At this stage, due to the improvement of the sampling speed and accuracy of terminal devices, the amount of communication data of the terminal has also increased, which has also brought about higher data processing capacity requirements. In addition, we have found that in some domestic scenarios, the development of intelligent power grids is rapid, and some smart devices have already had functions such as harmonic analysis to achieve power quality analysis, management and detection of power grid status, and the ability to detect unauthorized terminal device connections. This poses new challenges to processor performance in addition to reliability. Sitara AM3352 devices can meet these performance challenges with a high-performance Cortex-A8 core up to 1GHz. Compared with the ARM9 devices that previously dominated the market, the Arm Cortex-A8 devices have almost doubled their performance in DMIPS at the same frequency level. The AM3352 with industrial temperature range support can serve as a reliable and well-scalable platform to meet different levels of data processing needs with the same hardware design, because it provides different CPU frequency options of 300, 600, 800 and 1000MHz in the same package.
Safety protection function for protecting power grid equipment
Like most Sitara processors, the AM3352 provides security features to ensure the communication security of data concentrators in the power grid network. Specifically, the AM3352 has built-in hardware encryption accelerators for AES, SHA, and RNG, which provide an effective implementation method for the product's communication security solution. In addition to encryption functions, the AM3352 also supports advanced secure boot to protect your software and system security from hacker intrusion. All of these security features provide a reliable way to protect power grid equipment.
China Data Concentrator 2.0 Standard
Smart grid applications are developing rapidly in China. Various smart terminal devices can effectively monitor the power grid, report the status of the power grid in real time, and implement fault detection functions. The resulting massive data transmission and processing bring more challenges to the current data concentrator design.
Among the data concentrators currently in use, most designs are based on ARM9 devices with core performance around 300MHz~400MHz. In the past, single-channel AC sampling was often used, with limited sampling speed and no need for complex sampling processing. Therefore, when designing, only low-speed communication such as RS485 was used to meet the design requirements, and the shortcomings such as poor design scalability and low storage capacity requirements (usually less than 128 Mb) did not highlight any problems.
However, in order to meet the performance improvement requirements brought by the upgrade of smart grid equipment, the State Grid will soon release the Data Concentrator 2.0 standard. These upgrades need to consider the trend of using four-in-one meters for measuring water, electricity, gas and heat for data transmission, and also need to support power quality analysis and management functions, all of which require a significant increase in sampling speed. For real-time monitoring, the sampling interval will be shortened to 1 minute, resulting in a significant increase in the amount of data. The DDR and flash memory capacity on the previous data processor will not be enough to support such a large amount of data, so an upgrade of the processor platform is required. In addition, support for more efficient communication standards such as M_BUS, CAN, WIFI, etc. needs to be considered to meet the high-speed communication requirements of the future Data Concentrator 2.0 standard.
In short, in the future release of the Data Concentrator 2.0 standard, more powerful processors will be needed. The minimum frequency of ARM is 800MHz. Some performance indicators are also about to emerge, such as: when the CPU load is <40%, it should provide sufficient performance for the system and ensure normal operation; the internal bus speed should also be higher than 100 Mbps to ensure real-time functions; and the storage capacity needs to be at least 4 Gb to store large data streams; in order to obtain status updates in time in some cases, the minimum value of the target sampling interval is 1 minute.
The AM3352 processor, with its device series up to 1GHz, can become the core processor platform in your new generation of concentrators, easily meeting the high performance requirements of the data concentrator 2.0 standard. In addition to the reference design officially provided by TI, you can also use TI's existing third-party design resources to create a module system (SoM) or overall solution based on AM3352.
Texas Instruments' Sitara processor AM3352 provides a highly scalable and reliable platform, with rich peripheral resources to meet different performance requirements and security functions. As a processor platform, it supports multiple communication protocols such as RS485, Ethernet, BLE (including SPI and CAN), making it a good choice for your data concentrator. To help you get started, Texas Instruments provides the TMDXEVM3358 evaluation module (EVM), which can easily develop and design data concentrators. In addition, the Linux software development kit (SDK) provides a full set of related boot images for the evaluation board so that customers can test CPU performance and peripheral interface functions directly on the EVM.
Figure 2: Sitara TMDXEVM3358 evaluation module
In addition, another reference design is the Beaglebone Black development kit, which provides a 46-pin dual-row expansion header, giving customers the flexibility to test any function on the chip.
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