dsp28335 SCI Summary (Serial One-Step Communication)

Aguilera

dsp28335 SCI Summary (Serial One-Step Communication) [Copy link]

1. Serial transmission

1) Simplex: One-way data transmission, can only send or receive (1 data line)

2) Half-duplex: Data transmission is bidirectional, but at any time, only one data line can be sent or received (1 data line)

3) Full-duplex: Data transmission is bidirectional, but at any time, it can receive or send at the same time (2 data lines)

2. Communication rate

Baud rate (the number of bits transmitted per second) BRR=LSPCLK/((BRR+1)*8) or BRR=LSPCLK/16 (BRR=0)

3. Parity check: It adds an extra bit to each character to make the number of "1" in the character odd or even.

1) Odd parity: If the number of "1" in the character is even, the parity bit is "1", otherwise it is "0"

2) Even parity: If the number of "1" in the character is even, the parity bit is "0", otherwise it is "1".

4. SCI is generally regarded as UART (Universal Asynchronous Receiver/Transmitter) and is often connected to RS232 interface

DSP (TTL level (high 2.4V, low 0.4V)) is converted into RS232 level (high -3~-15v, low 3~15v) through MAX232

5.SCI transmit and receive data format (NRZ)

1 start bit -> 1~8 data bits -> 1 parity bit (optional) -> 1 or 2 stop bits -> additional bit to distinguish address and data (only exists in address bit mode)

The basic unit of data is called a character, and a data character with format information is called a frame.

6. Standard SCI mode and FIFO share one interrupt source 16-level FIFO

7.1)TXRDY:SCITXBUF empty (no shift) (SCITXBUF->TXSHF)

2)TX EMPTY: Transmit and shift empty

8. When both ABD and CDC bits are set, it means that the baud rate automatic detection starts working. In the interrupt service subroutine, the CDC bit must be cleared to 0 by software, otherwise no interrupt will be generated in the future. (Write 1 to ABD CLR to clear the ABD bit and respond to the interrupt)

9. Multiprocessor Communication

Receiving steps: 1) When receiving the address block, the SCI port wakes up and requests an interrupt (RX/BK INT ENA bit requests an interrupt), and reads the first frame of the address block, which contains the address of the destination processor

2) Start the software process by interrupting the received address, and then compare the device address stored in the memory with the address byte of the received data.

3) If the address matches, the CPU clears the SLEEP bit and reads the remaining data in the block, otherwise exits the subroutine and keeps the SLEEP bit.

1) Address bit multiprocessor mode

The last data bit of the frame is followed by an additional bit, called the address bit.

2) Idle Line Multiprocessor Mode

Idle time after one frame (10 or more high levels)

Note: Before sending the address data after setting TXWAKE, write irrelevant data to SCITXBUF to ensure that there is enough idle time to send.

10. WUT->TXWAKE TXSHF->SCIBUF forms a double buffer (when the SCIBUF value is moved into TXSHF, the TXWAKE value is moved into WUT).