NMOS application solution!

Kkk-

NMOS application solution! [Copy link]

As shown in the figure, this should be an application circuit of a power switch made of NMOS. I would like to ask you how this NMOS is controlled? I don't understand.

LeoMe

Uh, D1 is drawn upside down? IO controls Q2, Q2 controls the MOS gate. It may be easier to understand if you move the GND on the right side of the schematic to the bottom.

Kkk-

LeoMe posted on 2020-3-17 08:49 Um, D1 is drawn upside down? IO controls Q2, Q2 controls the MOS gate, it may be easier to understand if you move the GND on the right side of the schematic to the bottom

I think so too, but if we reverse D1, 48V is divided by R4 and R8 to the base of Q2, then Q2 is normally open, which means it is not controlled by IO_lock.

maychang

Kkk- Published on 2020-3-17 08:59 I think so too, but if we reverse D1, 48V is divided by R4 and R8 to the base of Q2, then Q2 is normally open, right? That is, it is not affected by IO_ ...

D1 in turn, Q2 is turned off due to the low level of IO lock, and the MOS tube will be turned on. Once the MOS tube is turned on, +48V will be short-circuited to the ground through D1 and the MOS tube.

maychang

I would like to ask you how this NMOS is controlled?

Obviously, when Q2 is turned off, the MOS is turned on because R3 pulls up D2 to limit the amplitude. When Q2 is saturated and turned on, the MOS gate is pulled to the ground and turned off.

Kkk-

maychang posted on 2020-3-17 09:23 I would like to ask you how this NMOS is controlled? Obviously, when Q2 is turned off, the MOS is turned on due to R3 pulling up D2 to limit the amplitude, and Q2 is saturated and conductive...

The diagram is correct. I understand. Normally, we use MOS tubes to control the on and off of the positive pole of the power supply. This diagram controls the on and off of the ground. Key_GND is the ground of the load. The positive pole of the load is connected to 48V. When the IO port is high, Q2 is turned on, and the voltage of the G pin of the MOS tube is pulled down and does not conduct. When the IO port is low, Q2 is cut off, the voltage of the G pin of the MOS tube is greater than the turn-on voltage, the MOS is turned on, the load ground is connected to GND, and the load works. Does what the teacher said make sense?

maychang

Kkk- Posted on 2020-3-17 17:40 The picture is correct. I figured it out. Normally, we use MOS tubes to control the on and off of the positive pole of the power supply. This picture controls the on and off of the ground. Key_GND is the ground of the load, ...

If one end of the load is connected to +48V and the other end is connected to Key_GND, and the positive end of the power supply is connected to +48V and the negative end is connected to GND, your explanation makes sense.

Kkk-

maychang posted on 2020-3-17 18:01 If one end of the load is connected to +48V and the other end is connected to Key_GND, the positive end of the power supply is connected to +48V and the negative end is connected to GND, your explanation makes sense.

Many thanks