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Summary of DSP boot mode / boot loader / power-on sequence / online upgrade and other issues [Copy link]

Device used: TI DSP C2000 2837X

1. DSP power-on process, boot mode and boot loader

1) dsp power-on sequence,

For a dual-core system, its power-on startup sequence is as follows:

After the system is reset or powered on again:

After the cpu2 system is powered on again, it has been in reset state

The cpu1 system will automatically jump to address 0x3fffc0 to get the reset vector. The purpose of the vector is to make the system automatically jump to address 0X3F8000 and start executing the boot loader code segment stored in the boot ROM segment.

For cpu1, the boot loader program in the boot ROM segment of cpu1 will first obtain the device configuration from the TI-OTP memory segment and configure the device.

After completion, the boot loader starts to execute the DCSM and OTP JTAGLOCK process: DCSM process: 1) Read Zx_pointer in OTP; 2) Decode pointer value; 3) Remove SECDC in TI-OTP; 4) Read Zx BOOT mode; 5) Read ZX DCSM module

After completion, the boot loader checks whether there is an error flag in the FUSEERR register and takes error handling mechanism

Then initialize the ECC/PARITY of RAM and memory side

After completion, cpu1 will guide CPU2 system to jump out of the reset operation, and then ignore the running status of cpu2

After that, the boot loader of CPU1 system will determine whether to start the program from flash or RAM according to the external GPIO and XRST (usually only when the downloader is linked), or when XRST is low, it will determine the startup mode according to the first 32-bit value of the PIE vector table (address 0xd00) (usually when the downloader is linked);

After confirmation, the boot loader code segment of CPU1 will update various information to the specified RAM segment to facilitate CPU1's program to read these status words.

At this time, the program jumps according to the startup method. If it is flash startup, the program pointer jumps to 0x80000 (the actual address of the flash). If it is RAM startup, the program pointer jumps to 0x00000 (the starting address of the RAM segment). At the same time, the boot loader ends and enters the main program of CPU1.

If the boot method at this time is peripheral boot, the boot loader will wait for the external program to load the program into RAM according to a certain format. After the program code is transferred, it will jump to the run pointer to start running the program code segment.

At this time, the boot loader of cpu1 has completed its mission, exited, and started executing the user program in CPU1.

At this time, the CPU2 system knowledge has exited the reset state and is still waiting for the boot mode to be determined. The user program of cpu1 is needed to guide the boot of cpu2. If cpu2 also needs to be started from flash, it can be triggered by the ipc command. However, if cpu2 also needs to be started from the peripheral, the application of cpu1 needs to set the pin of the peripheral first, and then trigger cpu2 to start accepting the program.

About the link downloader xrst is low is the system startup process reference manual

You can also refer to the manual for the code input format for peripheral startup.

//------------------------------------------------ -----------------------------------------------

2. Some solutions to achieve online upgrade:

This solution is to use: Upgrade code + user application to achieve

The purpose of the upgrade code is to download the code segment to the DSP and start running when it is powered on. Its main function is to monitor whether there is an upgrade instruction after power-on. If so, it will enter the upgrade process. If not, it will jump to the specified program running location through the jump instruction (LB).

Assumption: The actual address of the user application is defined as 0XC0000; when an instruction that needs to be upgraded is detected, the upgrade code writes the code sent from the host computer through the peripheral through the DSP's flash API into the FLASH sector with 0XC0000 as the starting address. When all the data is written, the program pointer jumps to 0XC0000 through a jump instruction, and the user program begins to execute.

Data format: The format of the upgrade code transmitted by the host computer is the content of the bin file. The DSP converts the .out file into a bin file, and then the DSP receives this file and writes it directly into the flash. The reason is: downloading the .out file of the same program to the DSP, and then using uniflsh to view the content of the internal code segment is the same as the content of the bin file.

As for why the format of the bin file and .out file is different from the data stream content on the datasheet, the reason has not been found yet.

This post is from DSP and ARM Processors
 

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