Share CC2541 Bluetooth learning about ADC

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Note the following points about the program:

1. To configure a port 0 pin as an ADC input, the corresponding bit in the APCFG register must be set to 1. The default value of this register selects the port 0 pin as non-ADC, that is, digital input and output. The setting of the APCFG register will override the setting of P0SEL, so there is no need to configure P0SEL again. In addition, for I/O ports as peripheral functions, there is no need to configure the direction, that is, there is no need to configure the register PxDIR.

2. For the configuration of a single ADC conversion, only register ADCCON3 needs to be configured, and registers ADCCON1 and ADCCON2 do not need to be configured. There is another method to determine whether the conversion is completed:

1 ADCCON1 |= 0X30; //ADC start mode selection is ADCCON1.ST=1 event
2 ADCCON1 |= 0x40; //Start conversion
3 while(!(ADCCON1 & 0x80)); //Wait for AD conversion to complete
ADCCON1.STSEL is the trigger mode used to start the conversion sequence. For a single ADC conversion, I personally feel that this configuration is not good. In the future, this judgment method will not be used for a single ADC conversion.

Single conversion determines whether the conversion is completed: determine the ADC interrupt flag ADCIF.

3. The highest bit of ADCH is the sign bit. For a single measurement, the result is always positive, so the sign bit is always 0. The effective value of the 14-bit ADC conversion value is not 14 bits.

The effective resolutions are as follows:
00: 64 decimation rate (7 bits ENOB)----ADCH low 7
bits01: 128 decimation rate (9 bits ENOB)---ADCH low 7 bits + ADCH high 2
bits10: 256 decimation rate (10 bits ENOB)--ADCH low 7 bits + ADCH high 3
bits11: 512 decimation rate (12 bits ENOB)--ADCH low 7 bits + ADCL high 5 bits

For example: when collecting VDD/3 value, use 12-bit resolution and reference voltage AVDD5:3.3V

VDD/3 = vddvalue*3.3/2^11
Expanded 10 times
VDD/3 = vddvalue*33/2^11
Why is it divided by 2^11 instead of 2^12? Because the highest bit is the sign bit, the 12-bit resolution is actually only 11 bits.
VDD = (vddvalue*33/2^11) * 3
4. Differential input can be used as a comparator. For example, channel ADCCON3.ECH=1000, corresponding to differential input AIN0-AIN1. If you want to compare the size relationship between an analog signal and another analog signal, you only need to connect these two signals to AIN0 and AIN1 respectively, and then judge the highest bit of ADCH. If it is 1, then AIN0<AIN1, if it is 0, then AIN0>=AIN1.

5. The maximum conversion voltage is equal to the reference voltage, and the reference voltage cannot be greater than the chip power supply voltage, which is generally 3.3 V. Although differential input can convert negative voltage, each analog input pin must be a positive voltage and less than the power supply voltage VDD. The negative voltage refers to the difference between the two input channels.