Mentor Analog FastSPICE Platform Improves Simulation Performance by 10 Times

Mentor Analog FastSPICE platform delivers innovative capabilities that dramatically accelerate nanometer-scale verification of large, post-layout analog designs

Mentor, a Siemens business, today announced a major advancement in its Analog FastSPICE platform with the introduction of Analog FastSPICE eXTreme, a revolutionary technology for large post-layout analog designs that significantly improves simulation performance while helping to maintain foundry-certified accuracy required for nanometer-scale analog verification.

Analog FastSPICE eXTreme is particularly important for analog designs with high parasitic complexity and large contact resistance. These issues are becoming increasingly serious as process geometries continue to shrink. Based on initial customer benchmark comparisons, the new technology provides 10 times the simulation performance compared to Mentor's previous generation Analog FastSPICE product and 3 times the performance compared to commercially available solutions with similar accuracy settings.

“We are committed to providing world-class silicon IP for high-performance clocking (e.g., PLLs) and low-power/high-speed data interfaces (e.g., SerDes), and our designs are used in the most advanced chip-level systems, so we need to support the latest 3nm FinFET processes, and it is imperative to be able to simulate FinFET designs quickly and accurately to meet our aggressive schedules,” said Randy Caplan, executive vice president of Silicon Creations. “We participated in an early beta program of Analog FastSPICE eXTreme technology with several large post-layout designs, and the results showed that the technology provides 10x speedup while maintaining SPICE-level accuracy. We look forward to using Analog FastSPICE to verify our fully extracted designs and achieve first-pass silicon success while meeting our performance and yield goals.”

Mentor Analog FastSPICE platform provides fast circuit verification for nanometer analog, radio frequency (RF), mixed signal, memory and custom digital circuits. The platform has passed the 5nm process certification of the wafer fab and is trusted and applied by many of the most successful analog integrated circuit designs in the world. It provides nanometer-level SPICE accuracy twice as fast as parallel SPICE simulators.

Analog FastSPICE customers can now use the new Analog FastSPICE eXTreme technology free of charge to gain additional performance benefits for their large post-layout analog designs. Analog FastSPICE eXTreme uses an innovative resistor-capacitor (RC) circuit reduction algorithm to significantly improve the performance of Analog FastSPICE's core SPICE matrix solver, and also includes comprehensive device noise analysis capabilities to support chip-level accurate simulations.

“Analog Bits is a leading provider of mixed-signal IP with a broad portfolio of low-power SerDes, PLLs, sensors and I/Os supporting the latest 3nm FinFET processes,” said Mahesh Tirupattur, executive vice president of Analog Bits. “We have a long-standing relationship with Mentor and their Analog FastSPICE platform and have participated in the AFS eXTreme early access program. Our low-power integrated timing and interconnect IP technology has stringent accuracy requirements that account for post-layout parasitics of FinFET designs to more accurately represent the true analog circuit response. Analog FastSPICE eXTreme technology delivers a 6x performance improvement while maintaining the SPICE accuracy required for nanometer-scale analog verification. Mentor and Analog FastSPICE will continue to deliver innovative SPICE technology for current and future designs.”

Analog FastSPICE eXTreme complements the Mentor Symphony Mixed-Signal Platform, which leverages the Analog FastSPICE circuit simulator and provides fast and accurate mixed-signal verification with industry-standard HDL simulators. The Symphony Platform provides an intuitive, easy-to-use model for verification of complex nanometer-scale mixed-signal ICs, with powerful debugging capabilities and configuration support.

“As analog, mixed-signal and RF designs continue to advance into new nanometer nodes, designers around the world are looking for significant improvements in circuit simulation performance without sacrificing accuracy at advanced nodes,” said Dr. Ravi Subramanian, senior vice president of IC Verification Solutions at Mentor. “Our circuit simulation R&D team has continued to innovate in overcoming each challenge at advanced nodes, and Analog FastSPICE eXTreme is an important milestone in the next chapter of our technology evolution.”