When configuring the STM32 timer, the timer interrupt enable, timer enable, and clear update interrupt flag have different effects when the three programs are executed in different orders, as follows:
TIM_ClearITPendingBit(TIM1, TIM_IT_Update); //Clear update interrupt request bit
TIM_ITConfig(TIM1, TIM_IT_Update, ENABLE); //Enable timer 1 update interrupt
TIM_Cmd(TIM1, ENABLE); //Start the timer
(1) The update interrupt routine will not be entered immediately.
TIM_ClearITPendingBit(TIM1, TIM_IT_Update); //Clear update interrupt request bit
TIM_Cmd(TIM1, ENABLE);
TIM_ITConfig(TIM1, TIM_IT_Update, ENABLE); //Enable timer 1 update interrupt
(2) The update interrupt routine will not be entered immediately.
TIM_Cmd(TIM1, ENABLE);
TIM_ClearITPendingBit(TIM1, TIM_IT_Update); //Clear update interrupt request bit
TIM_ITConfig(TIM1, TIM_IT_Update, ENABLE); //Enable timer 1 update interrupt
(3) The update interrupt procedure will not be entered immediately.
TIM_Cmd(TIM1, ENABLE);
TIM_ITConfig(TIM1, TIM_IT_Update, ENABLE); //Enable timer 1 update interrupt
TIM_ClearITPendingBit(TIM1, TIM_IT_Update); //Clear update interrupt request bit
(4) Immediately enter the update interrupt program.
TIM_ITConfig(TIM1, TIM_IT_Update, ENABLE); //Enable timer 1 update interrupt
TIM_ClearITPendingBit(TIM1, TIM_IT_Update); //Clear update interrupt request bit
TIM_Cmd(TIM1, ENABLE);
(5) . . . . . . Enter the update interrupt procedure immediately.
TIM_ITConfig(TIM1, TIM_IT_Update, ENABLE); //Enable timer 1 update interrupt
TIM_Cmd(TIM1, ENABLE);
TIM_ClearITPendingBit(TIM1, TIM_IT_Update); //Clear update interrupt request bit
(6) . . . . . . Enter the update interrupt procedure immediately.
Reference: http://www.51hei.com/bbs/dpj-40940-1.html
http://www.openedv.com/posts/list/41019.htm
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