Questions about reading ports and pins of 51 single-chip microcomputers

The 80C51 microcontroller has four P ports, P0-P3. Take P0 as an example:
To understand this problem, you need to understand the internal structure of port P0. Port P0 is connected
to the external pin by a latch through two driving field effect transistors. Reading the pin means directly reading the potential of the external pin of P0, while reading the port (latch) reads the potential of the internal latch connected to the data bus.
The two are different. Generally speaking, reading the data of P0 is reading the pin, the purpose is to obtain the state of the external circuit connected to P0. Reading the port is completed by the CPU itself when executing the following statement:
inc P0; add 1 to p0
When executing this statement, the "read-modify-write" process is adopted, first read the port data of p0, then add 1, and then send it to the latch of p0. Note that this port data is different from the pin state of p0. For example, if you write 69H to p0 in advance, the data in p0 is 69H, and the state on the pin will not enter the latch of p0 because you have not executed instructions such as MOV A, p0. It can be seen that the so-called reading port is not to read the state of p0, but it is completed by the CPU itself when executing instructions such as inc.
Reading the pin is to read the state of the p0 port. When reading the pin, pay attention to: first write FFH to p0 to disconnect its field effect tube T2 from the ground.
Because the field effect tube T2 of the p0 port is grounded at one end and connected to the external pin at the other end, it is controlled by the latch of P0. When writing 1 to the latch, it is disconnected from the ground, and when writing 0, it is connected to the ground, so when writing zero, it is always read at a low level.
Imagine that you want to read the P0 pin now. It stands to reason that P0 is connected to the external circuit, and what the external circuit is in is what you should read. However, if one end of the field effect tube T2 of the p0 port is grounded, it will pull down the potential of the p0 port, and you will always read a low level 0, so you must first write FFH to p0 to disconnect the field effect tube T2 of p0 from the ground, and then read the real state. When the external circuit is disconnected, the actual state of the p0 port (latch) is read again.