[Assembly Learning Notes] MCS-51 Addressing Mode

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There are seven addressing modes for MCS-51 instructions:

1. Immediate addressing - the operand appears directly in the instruction. The operand can be #da ta or #da ta16

     MOV A,#data

     MOV DPTR,# data16

2. Indirect addressing - the unit address of the operand appears directly in the instruction. This addressing method can access the internal storage unit. It includes:

   (1) Special function register address space. This is also the only addressing mode that can address special function registers (SFR, upper 128 bytes).

      MOV A,P1

      MOV TCON,A

   (2) The lower 128 bytes of internal RAM

      MOV A,76H

      MOV A,43H

3. Register addressing

      MOV A,R1

In this addressing mode, the contents of the register are the operands that can be used to access the current working register Rn, accumulator A, register B, bit accumulator C, and data pointer DPTR.

4. Register indirect addressing  

In this mode, the content in the specified register is the address of the operand, and the content of the storage unit corresponding to the address is the operand. In this addressing mode, the register is actually an address pointer. The registers that can be used for register indirect addressing are R0, R1, SP, and DPTR. When accessing the internal data memory, the current working registers R0 and R1 are used as indirect addresses. In stack operations, SP is used as indirect address. When reading external RAM, register indirect addressing must be used.

5. Displacement addressing - The displacement addressing method uses the program pointer PC or the data pointer DPTR as the base register and the accumulator A as the displacement register. The contents of the two are added (i.e., the base address + offset) to form a 16-bit operand address, which is mainly used to access a byte solidified in the program register.

(1) Use the program pointer PC as the base address and A as the displacement to form the operand address: @A+PC.

Use the address of the next instruction being executed (PC always points to the next instruction to be executed) + the address of A

(2) Use the data pointer DPTR as the base address and A as the index to form the operand address: @A+DPTR.

6. Relative addressing - Use the current value of the program counter PC as the base address and add it to the added offset rel given by the second byte in the instruction to obtain the relative offset address.

7. Bit addressing - The bit addressing space can only be all the bits in the 20H~2FH byte address of the on-chip RAM (the bit address is 00H~7FH) and some SFR bits (the address can be divided by 8).

Reference address:[Assembly Learning Notes] MCS-51 Addressing Mode

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