How to use LDR in ARM

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In the ARM instruction set, LDR is usually used as a load instruction, but it can also be used as a pseudo-instruction.

The form of the LDR pseudo-instruction is "LDR Rn,=expr". The following example illustrates its usage.

COUNT EQU       0x40003100

……

LDR       R1,=COUNT

MOV      R0,#0

STR       R0,[R1]

COUNT is a variable we defined, with the address 0x40003100. This definition method is very common in assembly language, and if you have used a single-chip microcomputer, you should be familiar with this usage.

LDR        R1,=COUNT puts the address of the COUNT variable, which is 0x40003100, into R1.

MOV       R0,#0 is to put the immediate value 0 into R0. The last sentence STR       R0,[R1] is a typical storage instruction, which puts the value in R0 into the storage unit with the value in R1 as the address. In fact, it puts 0 into the storage unit with the address 0x40003100. It can be seen that these three instructions are to complete the assignment of the variable COUNT. It seems a bit uncomfortable to use three instructions to complete the assignment of a variable. This may be related to ARM's use of RISC.

Here is another example

; Assign the value of COUNT to R0

LDR       R1,=COUNT

LDR       R0,[R1]

The pseudo-instruction LDR        R1,=COUNT is used to assign the address of COUNT to R1. If you are interested, you can look at the result after compilation. This instruction is actually compiled into an LDR instruction and a DCD pseudo-instruction.

Two uses of LDR
1) LDR pc, =MyHandleIRQ means putting the MyHandleIRQ symbol into the pc register
2) LDR PC, MyHandleIRQ means reading the value at the address represented by the MyHandleIRQ symbol in the memory, and the memory needs to be read one more time.
 
In the code:
start:
        ldr pc,=MyHandleReset    @jump to HandleReset
        ldr pc,=MyHandleUndef    @jump to HandleUndef
        ldr pc,=MyHandleSWI      @jump to HandleSWI
        ldr pc,=MyHandleIabort   @jump to HandleIabort
        ldr pc,=MyHandleDabort   @jump to HandleDabort
        nop
        ldr pc,=MyHandleIRQ      to HandleIRQ              <=the previous error line
        ldr pc,=MyHandleFIQ      @jump to HandleFIQ
 
@MyHandleIRQ:    .word OS_CPU_IRQ_ISR
MyHandleIRQ:
        sub lr, lr, #4           @ to calculate the return address       
        stmdb sp!, {r0-r12,lr}
        ldr lr, =int_return      @ restore the return address
        ldr pc, =int_handle      @ call for the interrupt handler
at the "previous error line". If it is changed to "ldr pc,MyHandleIRQ", when an interrupt comes, interrupt processing cannot be performed.
 
The other situation is correct. Please pay attention to it:
start:
        ldr pc,=MyHandleReset    @jump to HandleReset
        ldr pc,=MyHandleUndef    @jump to HandleUndef
        ldr pc,=MyHandleSWI      @jump to HandleSWI
        ldr pc,=MyHandleIabort   @jump to HandleIabort
        ldr pc,=MyHandleDabort   @jump to HandleDabort
        nop
        ldr pc,MyHandleIRQ      @jump to HandleIRQ              <= the previous wrong line
        ldr pc,=MyHandleFIQ      @jump to HandleFIQ
 
MyHandleIRQ:    .word OS_CPU_IRQ_ISR
@MyHandleIRQ:
       sub lr, lr, #4           @ to calculate the return address       
       stmdb sp!, {r0-r12,lr}
       ldr lr, =int_return      @ restore the return address
       ldr pc, =int_handle      @ call for the interrupt handler
Because when an interrupt comes, it is necessary to go to MyHandleIRQ to get OS_CPU_IRQ_ISR, which means fetching the memory one more time.

Keywords:ARM Reference address:How to use LDR in ARM

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