A new input current detection method based on digital power controller UCD3138

Publisher:陈书记Latest update time:2014-05-22 Source: 互联网Keywords:UCD3138 Reading articles on mobile phones Scan QR code
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1 Introduction

1.1 Application of digital power controller UCD3138

 

Digital power controller UCD3138 is usually placed on the secondary side of DC/DC power supply due to its good feedforward function, communication function and programmability. Common topology schemes include full bridge, half bridge and LLC. Figure 1 shows the block diagram of hard switch full bridge system using digital power (controller) UCD3138. UCD3138 is located on the secondary side and transmits the drive signal to the primary side through digital isolator ISO7420CF.

 

 


Figure 1. Hard-switching full-bridge system block diagram

 

1.2 Current Transformer in Isolated Power Topology

Figure 2 shows a current transformer used in full-bridge topologies. Its primary side is connected in series to the main power circuit, and the secondary side multiplies the current information attenuated in proportion (the proportional coefficient is the turns ratio T of the transformer) by the sampling resistor to obtain voltage information. The controller UCD3138 on the secondary side can complete functions such as cycle-by-cycle protection by reading the voltage information.

Output voltage of the secondary side of the transformer: VT = (Iin÷T) × Rs

Figure 2. Current Transformer Application Circuit

 

1.3 Principle of input current detection

Figure 3 shows the voltage signal at the output end of the secondary side of the current transformer. The upper and lower waveforms are the corresponding outputs when the input voltage is different. After the output power is determined, as the input voltage increases, the rising edge of the trapezoidal wave will become steeper and its average value will become lower.

 


Figure 3. Current Transformer Output Signal

 

The average value of the signal at the output end of the current transformer is approximately proportional to the average value of the system input current, so the input current can be inferred by reading the average value of the output end of the current transformer.

 

2 UCD3138 AFE module and Filter module

2.1 Module Function Overview

The AFE and Filter of UCD3138 are used to complete the acquisition, conversion and loop calculation of the output voltage error. The output data enters the DPWM module and finally generates a suitable duty cycle, as shown in Figure 4.

 


Figure 4. UCD3138 AFE and Filter

 

In practical applications, AFE and Filter can be used to collect the signal at the output of the current transformer and finally calculate its average value. The realization of this function depends on the following characteristics of AFE and Filter:

1) The EADC in the AFE has an oversample function and can collect 1, 2, 4, or 8 samples in one cycle;

2) AFE can average the data output by EADC, that is, it can accumulate 2, 4, or 8 consecutively collected data and then divide it by the number to get the average value.

3) The filter is a PID structure, so only the accumulation link (Integration branch) can be used to calculate the cumulative sum over a period of time.

2.2 Oversampling of EADC

The DPWM module can generate a sampling trigger signal in the EADC module, so that the EADC completes one sampling. At the same time, the EADC also has the function of multiple (2 times, 4 times and 8 times) sampling. Taking 8 sampling as an example, when the EADC receives the sampling trigger signal of the DPWM, the EADC completes 8 samplings at 1/8, 2/8, 3/8, 4/8, 5/8, 6/8, 7/8 and the sampling base, respectively, as shown in Figure 5.

 


Figure 5. EADC Oversample

 

2.3 EADC averaging

EADC provides two data averaging methods, namely, continuous mode averaging and spatial mode averaging. Figure 6 shows how to average data in continuous mode. The principle is to accumulate 2, 4 or 8 consecutively sampled data, and then divide it by the accumulated number to get the average value.

The calculated average value will be sent to the Filter stage.

 


Figure 6. EADC Oversample

 

2.4 UCD3138 Filter

Figure 7 is the filter of UCD3138, based on PID structure. When only I branch (accumulation link) is used, Xn data can be accumulated continuously, and the accumulated result is stored in KI_YN register. Xn data is the output from EADC.

 


Figure 7. UCD3138 Filter Structure

 

2.5 Full-process data processing

When oversample is configured to 8 times and the average number of EADC is configured to 2 times, the data obtained by the KI_YN register within 2 cycles is shown in Figure 8 below:

1) 8 samples are collected in each cycle, so a total of 16 samples are collected in 2 cycles;

2) Every two samples are averaged, and the averaged data enters the accumulation stage;

3) In 2 cycles, the KI_YN register stores the accumulated sum of 8×2=16 samples in total;

 


Figure 8. Full-process data processing

 

3 Read the average value of the triangle wave

3.1 Brief description of test principle

Connect a DC level signal or a triangle wave signal to the EAP1/EAN1 pin of UCD3138 (as shown in Figure 4), and then configure reasonable
oversample, averaging and the number of cycles collected. Finally, the total sample amount can be obtained in the KI_YN register.

Then divide the sample sum by the number of samples to get the sample mean.

3.2 Reading the average value of DC level signal

A DC level signal is connected to the EAP1 pin (such as CH1 in the left middle of Figure 9), and the measured average value is 220mV.

By configuring oversampling to 8 times and averaging to 8 times, the average value obtained in two cycles is -156÷8=-19.5. At this time, the value written in the DAC_Value register is 2048. Therefore, the average value determined by software sampling is:
(2048÷16)×1.5625mV - (-19.5) = 219.5mV
. The deviation between this value and the actual value is less than -0.5%. The meaning of the above formula can be referred to "Reference 5".

 


Figure 9. DC signal average value reading

 

3.3 Reading the average value of triangular flow

A triangle wave signal is connected to the EAP1 pin (as shown in CH1 in the left of Figure 10), and the measured average value is 136mV.

By configuring oversampling to 8 times and averaging to 8 times, the average value obtained in two cycles is 466÷8=58.25. At this time, the value written in the DAC_Value register is 2048. Therefore, the average value determined by software sampling is:
(2048÷16)×1.5625mV - 58.25= 141.75mV
. The deviation between this value and the actual value is less than 5%.

 


Figure 10. Reading the average value of a triangle wave signal

 

3.4 Software Process and Code

FIG11 is a software flow chart of the entire data processing, which mainly includes two parts: initialization and configuration in the main program, and data processing in the fast interrupt program.

For the fast interrupt part, use periodic fast interrupt, and the interrupt interval is 256 cycles. Each processing enters the fast interrupt three times in succession. After the first fast interrupt, configure EADC and Filter; after the second entry, read the data. At this time, there are 8×256=2048 samples accumulated in KI_YN. (oversample is set to 8)

 


Figure 11. Software Process Flow

 

The key codes are as follows:

1. Configure Dpwm0 periodic interrupt and enable interrupt function

 


2. Fast interrupt handler

Data is read only after entering the fast interrupt for the second and third time.

 


3. Configuration function handle_current_averaging_config()

This function mainly completes the connection configuration between EADC1 and Filter1, the basic configuration of EADC (including the writing of DAC_VALUE, the configuration of AFE_GAIN, the configuration of Averaging, etc.), the configuration of Oversample and the configuration of Filter.

 

 

4. Configure the function handle_current_averaging()

This function mainly completes the reading of data in the KI_YN register, the resetting of the filter (the KI_YN register needs to be cleared,
otherwise the register will overflow) and the enabling of the filter.

 


4 Measured single board input current

4.1 Test Board Overview

The actual test of input current is carried out on a UCD3138-based hard-switched full-bridge EVM board (UCD3138HSFBEVM-029). The key technical specifications of the board are as follows:
● Input voltage: 36V~72V
● Output power: 12V×30A
● Power topology: single-stage hard-switched full-bridge
● Current transformer: As shown in Figure 2, the turns ratio of T1 is 100:1 and Rs is 10 ohm.
In order for EADC1 and Filter1 to read and calculate the input current, the output of the secondary side of the current transformer needs to be connected to EAP1 and EAN1. The rest of the board retains the original design.

 

4.2 Measured data

1. The output current is set to 3A and the input voltage is set to 50V

The measured output signal of the current transformer is shown in Figure 12 (left), with an average value of 89.26mV. At this time, the input current is 850mA, and there is an approximate proportional relationship between the two. The proportional coefficient is mainly determined by the turns ratio of the transformer and the sampling resistor: 0.01×10=0.1.

 


Figure 12. Measured waveform and actual read data 1

 

Set DAC_VALUE to 1024. After software calculation, the value of the current_x16 variable (refer to Section 3.4 for the meaning of this variable) is 9, as shown in Figure 12 (right). Therefore, the calculated average value is:
(1024÷16)×1.5625mV – 9 = 91mV.
The error between this value and the measured value is less than 5%, and the error between this value and the actual input current is less than 7%.

 

2. The output current is set to 3A and the input voltage is set to 55V

The measured output signal of the current transformer is shown in Figure 13 (left), with an average value of 82.48mV. At this time, the input current is 780mA.

 

Figure 13. Measured waveform and actual data reading 2

 

Set DAC_VALUE to 1024, and after software calculation, the current_x16 variable value read is 15, as shown in Figure 13 (right). Therefore, the calculated average value is:
(1024÷16)×1.5625mV – 13 = 87mV.
The error between this value and the measured value is less than 5%, and the error between this value and the actual input current is less than 12%.

 

5 Conclusion

From the above description, we can know that after configuring the EADC and Filter of UCD3138 accordingly, the average value of the input signal of the EAP/EAN pin can be read, and the error between the read value and the actual value is small.

 

Similarly, this function can be applied to the reading of the input current of a single board, and the actual measurement results also confirm this. Due to the large error between the actual input current and the output of the current transformer under light load conditions, there is a certain error between the software reading value and the actual input current.

Keywords:UCD3138 Reference address:A new input current detection method based on digital power controller UCD3138

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A new input current detection method based on digital power controller UCD3138 (Part 2)
3 Read the average value of the triangle wave 3.1 Brief description of test principle Connect a DC level signal or a triangle wave signal to the EAP1/EAN1 pin of UCD3138 (as shown in Figure 4), and then configure a reasonable Oversampling, averaging and the number of cycles collected will eventually give the total num
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