The establishment of China's lithography technology system requires overcoming these obstacles

On October 18, 2018, the 2nd International Workshop on Advanced Lithography (IWAPS 2018) was grandly held in Xiamen. As a grand event in the lithography industry, IWAPS provides a broad technical exchange platform for senior technical experts and outstanding researchers from the semiconductor industry and academia at home and abroad. Participants can share their research results on topics such as materials, equipment, processes, measurement, computational lithography and design optimization, and discuss the challenges that will be faced in the graphic solutions seminar.

This conference was hosted by the Integrated Circuit Industry Technology Innovation Strategic Alliance, organized by the Institute of Microelectronics of the Chinese Academy of Sciences and Xiamen Semiconductor Investment Group Co., Ltd., and co-organized by the Chinese Optical Society. Participants included the conference vice chairman, director of the Institute of Microelectronics of the Chinese Academy of Sciences, vice chairman and secretary general of the Integrated Circuit Industry Technology Innovation Strategic Alliance, researcher Ye Tianchun, secretary general of the Chinese Optical Society and director of the Institute of Optoelectronic Engineering of Zhejiang University, Professor Liu Xu, member of the Standing Committee of the Xiamen Municipal Party Committee, secretary of the Haicang District Party Committee, and secretary of the Party Working Committee of the Haicang Taiwan Investment Zone, Lin Wensheng. More than 300 representatives from many famous companies, manufacturers, scientific research institutions, and universities from all over the world attended the conference.

The challenges facing lithography are increasing

Since its birth, the continuous development of photolithography technology has provided guarantees for the progress of integrated circuit technology in three aspects: first, large-area uniform exposure, making a large number of devices and chips on the same silicon wafer at the same time, ensuring the level of mass production; second, the continuous reduction of graphic line width, the continuous improvement of integration, and the continuous reduction of production costs; third, due to the reduction of line width, the running speed of devices is getting faster and faster, and the performance of integrated circuits is constantly improving. However, with the increase in integration, the difficulties faced by photolithography technology are also increasing.

The general photolithography process involves cleaning and drying the silicon wafer surface, coating the primer, spin-coating photoresist, soft baking, alignment exposure, post-baking, developing, hard baking, etching, etc. Among these, the importance of photolithography equipment is self-evident.

TEL (Tokyo Electric Corporation) is a world leader in semiconductor manufacturing equipment and flat panel display (FPD) manufacturing equipment. Its products mainly include semiconductor manufacturing equipment (coating and developing equipment, thermal treatment film forming equipment, dry etching equipment, chemical vapor deposition equipment, physical vapor deposition equipment, electrochemical deposition equipment, cleaning equipment, packaging and testing equipment, etc.) and flat panel display equipment (dry etching equipment, coating and developing equipment), etc. The company's products have excellent characteristics in manufacturing process and mass production, and have been widely used in production lines by semiconductor manufacturers and FPD manufacturers around the world.

At this conference, Hiromitsu Maejima, an expert from TEL, and Qian Liqun, marketing director of TEL China, introduced the process technology of the latest Coater/Developer products and the latest development direction of the Coater/Developer system in the next ten years to the participants, and pointed out that the issue of defect control needs to be emphasized in wafer manufacturing. Mr. Maejima said: "In the process of defect improvement, the focus should be on how to effectively reduce the defects caused by equipment and processes, which requires strengthening equipment management. In this regard, TEL has enhanced the monitoring of wafer status and log data analysis."

Qian Liqun

Lithography simulation faces challenges at advanced technology nodes

Today, advanced processes have evolved to 7nm. In order to solve the problems of graphic distortion, graphic resolution and chip yield that follow in actual production, the development and application of resolution enhancement technology has increasingly become a hot topic in the lithography research community.

Resolution enhancement technology is an important means to achieve high-resolution lithography imaging quality in lithography. Currently, the two main resolution enhancement technologies are optical proximity correction (OPC) and phase-shifting mask technology (PSM), and these technologies require the support of lithography simulation processes.

By predicting the image formed by the mask on the silicon wafer surface under actual lithography conditions through lithography simulation, the time required for effective lithography solutions in actual production can be shortened, thus solving problems from design to manufacturing.

So how do you ensure that the simulation is correct? How do you ensure that the input parameters are the parameters to be simulated? For lithography simulation OPC suppliers, how to use lithography information becomes an important basis for successful simulation.

The Calibre series of products launched by Mentor is a complete physical verification and sub-wavelength solution in the industry.

The Calibre physical verification tool suite, including Calibre DRC and Calibre LVS, can ensure that the physical design of integrated circuits complies with foundry manufacturing specifications and that component functions meet the original design specifications in practical applications. For sub-wavelength design, Calibre uses a hierarchical verification engine to provide a set of tools that can add or build models and verify four major resolution enhancement technologies - optical proximity correction (OPC), phase shift mask (PSM), optical auxiliary graphics (Scattering Bar) and off-axis illumination (OAI) technology. Currently, the Calibre suite has become a standard adopted by many manufacturers.

At this conference, Mentor's speech focused on the latest innovative technologies and solutions of Calibre. According to Pete Ling, General Manager of Mentor China, the company is committed to reducing verification cycles, completing designs faster and managing design process interactions; creating and verifying defect-free designs; using advanced OPC and RET to understand process limitations and expand process margins; improving the productivity of wafer fabs, shortening R&D and production cycles, and thus reducing process complexity and costs.

Pete, General Manager of Mentor China, said: "Mentor focuses on the design chain and cooperates with upstream and downstream manufacturers from the early stage to achieve full-process research and development."

Left: Pete Ling, General Manager of Mentor China; Right: Minghui Fan, Senior Director of Mentor Global Semiconductor Solutions Technology Team

The role of mask technology in lithography systems

In the actual semiconductor manufacturing process, we should also pay attention to the importance of photomasks. Photomasks are graphic masters used in the photolithography process. They are formed by an opaque light-shielding film on a transparent substrate to form a mask pattern, and then the pattern is transferred to the product substrate through exposure. This is a key part of the semiconductor manufacturing process, the most expensive part of the process, and one of the bottlenecks that limit the minimum line width.

As the world's leading photomask supplier, Toppan Group has the industry's most advanced R&D capabilities and a full range of photomask production technologies and production capacity, which can meet the increasingly complex and diverse product and service needs of the global semiconductor industry. They have also made new progress in the research of next-generation ArF immersion and EUV masks.

In the face of advanced nodes, Toppan has already achieved 10nm photomask production process through electron beam direct writing technology. Currently, Toppan is developing new technologies from the material aspect to ensure that the requirements of 7nm and below nodes are met.

Tom Obayashi, Director of Toppan China Lithography Project, left

What issues should be addressed on the road to localization of photoresist?

The quality and performance of photoresist are key factors affecting the performance, yield and reliability of integrated circuits. In the process of semiconductor manufacturing, photoresist materials account for about 4% of the total cost of IC manufacturing materials. Therefore, while developing photolithography technology, my country should also pay attention to the development of photoresist materials.

"The challenges faced by photoresist companies are not only to meet the performance requirements of photoresists, but also to ensure the quality of photoresists and to ensure the timely supply of products." Lu Zhijian, general manager of Dow Chemical's photolithography business unit, said: "Dow Chemical has a complete R&D and production system to ensure quality and supply chain stability. In addition, innovation and talent are the driving force for an enterprise to keep moving forward."

From the history of photoresist development, the exposure wavelength of photoresist has moved from broad spectrum ultraviolet g-line (436nm)/i-line (365nm) to laser KrF (248nm) → ArF (193nm) → EUV (13.5nm). As the exposure wavelength shortens, the ultimate resolution that photoresist can achieve continues to increase, the circuit pattern obtained by lithography has better precision, and the corresponding photoresist price is also higher.

Dow Chemical said Lu Zhijian, general manager of the lithography business unit

However, the Chinese photoresist market is basically occupied by foreign-funded enterprises.

Data shows that among all types of semiconductor photoresists, Japanese and American companies have basically monopolized the g/i-line photoresist and KrF/ArF photoresist markets. The main manufacturers are JSR, Shin-Etsu Chemical, TOK, Dow Chemical, etc. my country's semiconductor photoresist manufacturers mainly include Suzhou Ruihong and Beijing Kehua. The two companies continue to increase their R&D investment and innovation, and with the innovation of related scientific research units, they are expected to continue to lead the localization process of semiconductor photoresists and gradually reduce my country's dependence on imports of semiconductor photoresists. However, from the current point of view, their products are still in the middle and low-end position, and there is still a long way to go in the future.

"my country now attaches great importance to the research on photoresist. In the field of high-end photoresist, my country's scientific research institutions have achieved certain results. However, on the road to commercialization, research institutions should pay more attention to the connection between Fabs. Take EUV as an example. Due to the different production modes, very good edge roughness is required in ultra-fine lithography." Dr. Yang Guoqiang, Vice President of the University of Chinese Academy of Sciences and Research Fellow of the Institute of Chemistry, Chinese Academy of Sciences, said: "Talents related to photoresist need to be cultivated jointly by scientific research institutions and enterprises. Only by combining production, learning and research can the development of the photoresist industry be promoted more healthily."

With the help of this conference, we hope to create a better future for China's lithography industry.

Dr. Yang Guoqiang, Vice President of University of Chinese Academy of Sciences and Research Fellow of Institute of Chemistry, Chinese Academy of Sciences

Today is the 1763rd issue of content shared by "Semiconductor Industry Observer" for you, welcome to follow.

Moore Elite is a leading chip design accelerator that reconstructs semiconductor infrastructure to make it easier for China to make chips. Its main businesses include "chip design services, supply chain operation services, talent services, and enterprise services". It covers more than 1,500 chip design companies and 500,000 engineers in the semiconductor industry chain, and has precise big data on integrated circuits. It currently has 200 employees and is growing rapidly. It has branches and employees in Shanghai, Silicon Valley, Nanjing, Beijing, Shenzhen, Xi'an, Chengdu, Hefei, Guangzhou and other places.

Click to read the original article to learn more about Moore's elite