Point-of-Load (POL) is the power supply next to the load. Generally, we will place the point-of-load power supply as close to the load as possible to ensure the maximum power supply efficiency and accuracy.
Figure 1: Common POL power supply topology
This article analyzes the impact of PCB trace resistance and parasitic parameters on transmission efficiency to explain why the power supply should be placed as close to the load as possible. Then, through POL application design examples, we will look at the factors that need to be paid attention to in POL design.
Why should the power supply be placed as close to the load as possible?
Especially for high current loads, we may need to consider the impact of PCB trace resistance and parasitic parameters on transmission efficiency.
The following table compares the impact of different PCB trace widths on transmission efficiency:
Figure 2: Voltage drop for different PCB trace widths
Wider PCB traces can indeed reduce the voltage drop on the PCB traces, but we also need to consider parasitic parameters. Parasitic inductance will suppress the dynamic change of current di/dt when the load changes, deteriorating transient response; while parasitic capacitance will cause voltage drop.
Figure 3: PCB trace parasitic inductance/capacitance
According to the ADI
LTspice
®
model, the estimated inductance of the 50mm PCB trace in the above figure is about 14.1nH.
Figure 4: Effect of parasitic inductance/capacitance on transient response (Image source: ADI)
As shown in the figure above, parasitic inductance suppresses the dynamic change of current di/dt during transient load changes, thereby deteriorating transient response, while parasitic capacitance causes voltage drop.
Ideal PCB routing for POL
The ideal PCB routing for POL is shown in the figure below.
Figure 5: Ideal PCB routing for POL (Image source: ADI)
As can be seen from the figure, the POL should be as close to the load as possible, with short and wide traces, so as to minimize the impact of PCB resistance and parasitic parameters.
To summarize - placing the power supply as close to the load as possible helps reduce PCB trace resistance and parasitic parameters, thereby maximizing power supply efficiency and accuracy.
Since the distance between the POL power supply and the load is required to be as short as possible, we must pay attention to the PCB footprint and heat dissipation design of the POL power supply during design to ensure the feasibility of the solution.
PCB footprint of POL power supplies
Traditional power supply solutions may be very large, but specialized POL solutions will minimize the size of the power supply.
Traditional solution (controller
+ external MOS tube):
The traditional solution can solve the problem of high current load as long as it is placed close to the load, but this solution is often very large in size.
Figure 6:
Traditional solution: controller
+ external MOS tube
(Image source: ADI)
POL solution: controller + internal FET:
For example, use
LTC3310S
, which is a chip specially designed for POL, which greatly reduces the footprint of the PCB board.
The LTC3310S has a load current of up to 10A, a size of only 3mm × 3mm, and contains a built-in MOS tube. It supports 5MHz high-frequency operation, so smaller output capacitors can be used.
Let's take a look at the performance of LTC3310S: Assuming 3.3V to 1.2V, 2MHz, output capacitance of 110μF, inductance of 100nH, when the load changes from 1A to 9A, the load current rise rate is: 1A/us. The figure below shows the output performance of LTC3310S when the load changes from 1A to 9A.
Figure 7: Output performance of the LTC3310S when the load changes from 1A to 9A (Image courtesy of ADI)
That is, with 110
µF
output capacitance, this performance is achieved, with an 8 A load change resulting in an output voltage shift of less than ±40 mV.
Good heat dissipation design:
In addition to the PCB area, there is another problem that must be solved when designing POL - good heat dissipation design. High-performance single-chip POL can indeed save a lot of space, but it may also cause excessive heat generation, so a good heat dissipation design is required.
Good PCB design helps dissipate heat.
Figure 8: LTC3310S recommended ground plane design (Image source: LTC3310S data sheet)
For common two-layer PCB boards, the ground plane can be enlarged, and thermal vias can be set in key areas with high heat generation to speed up heat conduction. In addition, temperature detection can be used to actively shut down the circuit when the corresponding temperature is reached to prevent the chip from overheating. For example, the LTC3310S has a built-in temperature detection function. If the temperature exceeds a certain threshold, the circuit will shut down automatically.
Next, let's look at the actual temperature of the LTC3310S after optimizing the thermal design:
Figure 9: LTC3310S heat generation (Image source: ADI)
-
LTC3310S: 3.3V to 0.6V, 5A
-
Surface temperature: 101.6℃
-
Node temperature: 102.2℃
-
PCB surface temperature: 96.7℃
Design Resources from Digi-Key
To help developers successfully complete POL application design, Digi-Key can provide a wealth of design resources.
In Digi-Key's "DC Converter" category, you can filter out suitable POL modules based on the filter items in the Type column.
At the same time, Digi-Key and can provide LTC3310S supporting development board to save time for designing POL circuits.
Placing the power supply as close to the load as possible is beneficial to reducing the resistance and parasitic parameters of the PCB traces, thereby maximizing power supply efficiency and accuracy. For POL design, reducing the POL power supply PCB area and optimizing the heat dissipation design are the top priorities of POL design.
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about
POL
, please click the following link. You are also welcome to leave a message at the end of the article for discussion.
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