709269L12G datasheet, PDF - EEWORLD Datasheet

709269L12G: DescriptionApplication Specific SRAM, 16KX16, 12ns, CMOS, CPGA108, PGA-108; Categorystorage storage; File Size193KB，18 Pages; ManufacturerIDT (Integrated Device Technology); Environmental Compliance

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709269L12G Overview

Application Specific SRAM, 16KX16, 12ns, CMOS, CPGA108, PGA-108

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Objectid	1126067117
package instruction	PGA-108
Reach Compliance Code	compliant
ECCN code	EAR99
Maximum access time	12 ns
Other features	FLOW-THROUGH OR PIPELINED ARCHITECTURE
Maximum clock frequency (fCLK)	50 MHz
I/O type	COMMON
JESD-30 code	X-CPGA-P108
JESD-609 code	e3
memory density	262144 bit
Memory IC Type	APPLICATION SPECIFIC SRAM
memory width	16
Humidity sensitivity level	3
Number of functions	1
Number of ports	2
Number of terminals	108
word count	16384 words
character code	16000
Operating mode	SYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	16KX16
Output characteristics	3-STATE
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	PGA
Encapsulate equivalent code	QFP100,.63SQ,20
Package shape	UNSPECIFIED
Package form	GRID ARRAY
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	260
power supply	5 V
Certification status	Not Qualified
Maximum standby current	0.005 A
Minimum standby current	4.5 V
Maximum slew rate	0.34 mA
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Matte Tin (Sn) - annealed
Terminal form	PIN/PEG
Terminal pitch	0.5 mm
Terminal location	PERPENDICULAR
Maximum time at peak reflow temperature	30

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