2 input nor gate
Parameter Name | Attribute value |
Is it Rohs certified? | incompatible |
Maker | Toshiba Semiconductor |
Parts packaging code | SON |
package instruction | VSOF, FL6,.047,20 |
Contacts | 5 |
Reach Compliance Code | unknow |
series | LVP |
JESD-30 code | R-PDSO-F5 |
JESD-609 code | e0 |
length | 1.6 mm |
Load capacitance (CL) | 30 pF |
Logic integrated circuit type | NOR GATE |
MaximumI(ol) | 0.0003 A |
Number of functions | 1 |
Number of entries | 2 |
Number of terminals | 5 |
Maximum operating temperature | 85 °C |
Minimum operating temperature | -40 °C |
Package body material | PLASTIC/EPOXY |
encapsulated code | VSOF |
Encapsulate equivalent code | FL6,.047,20 |
Package shape | RECTANGULAR |
Package form | SMALL OUTLINE, VERY THIN PROFILE |
power supply | 1.2/3.3 V |
Prop。Delay @ Nom-Su | 56 ns |
propagation delay (tpd) | 56 ns |
Certification status | Not Qualified |
Schmitt trigger | NO |
Maximum seat height | 0.6 mm |
Maximum supply voltage (Vsup) | 3.6 V |
Minimum supply voltage (Vsup) | 0.9 V |
Nominal supply voltage (Vsup) | 3 V |
surface mount | YES |
technology | CMOS |
Temperature level | INDUSTRIAL |
Terminal surface | Tin/Lead (Sn/Pb) |
Terminal form | FLAT |
Terminal pitch | 0.5 mm |
Terminal location | DUAL |
width | 1.2 mm |