EN29LV400B-90TIP datasheet, PDF

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EN29LV400B-90TIP: DescriptionFlash, 256KX16, 90ns, PDSO48, TSOP1-48; Categorystorage storage; File Size318KB，42 Pages; ManufacturerESMT; Websitehttp://www.esmt.com.tw/; Environmental Compliance; Elite Semiconductor Memory Technology Inc. (ESMT) is a professional IC design company founded by Dr. Hu Zhao in June 1998. Its headquarters is located in Hsinchu Science Park, Taiwan. The company's main business includes research, development, manufacturing, sales and related technical services of IC products. It was listed on the Taiwan Stock Exchange in March 2002.

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EN29LV400B-90TIP Overview

Flash, 256KX16, 90ns, PDSO48, TSOP1-48

EN29LV400B-90TIP Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	ESMT
package instruction	TSOP1, TSSOP48,.8,20
Reach Compliance Code	unknow
Maximum access time	90 ns
Spare memory width	8
startup block	BOTTOM
command user interface	YES
Data polling	YES
Durability	100000 Write/Erase Cycles
JESD-30 code	R-PDSO-G48
length	18.4 mm
memory density	4194304 bi
Memory IC Type	FLASH
memory width	16
Number of functions	1
Number of departments/size	1,2,1,7
Number of terminals	48
word count	262144 words
character code	256000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	256KX16
Package body material	PLASTIC/EPOXY
encapsulated code	TSOP1
Encapsulate equivalent code	TSSOP48,.8,20
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE
Parallel/Serial	PARALLEL
power supply	3/3.3 V
Programming voltage	3 V
Certification status	Not Qualified
ready/busy	YES
Maximum seat height	1.2 mm
Department size	16K,8K,32K,64K
Maximum standby current	0.000005 A
Maximum slew rate	0.03 mA
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	2.7 V
Nominal supply voltage (Vsup)	3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	GULL WING
Terminal pitch	0.5 mm
Terminal location	DUAL
switch bit	YES
type	NOR TYPE
width	12 mm

EN29LV400B-90TIP Preview

EN29LV400

4 Megabit (512K x 8-bit / 256K x 16-bit) Flash Memory

Boot Sector Flash Memory, CMOS 3.0 Volt-only

FEATURES

•

3V, single power supply operation

- Full voltage range: 2.7-3.6 volt read and write

operations for battery-powered applications.

- Regulated voltage range: 3.0-3.6 volt read

and write operations and for compatibility with

high performance 3.3 volt microprocessors.

•

High performance

- Access times as fast as 45 ns

•

Low power consumption (typical values at 5

MHz)

- 7 mA typical active read current

- 15 mA typical program/erase current

- 1

µA

typical standby current (standard access

time to active mode)

•

Flexible Sector Architecture:

- One 16 Kbyte, two 8 Kbyte, one 32 Kbyte,

and seven 64 Kbyte sectors (byte mode)

- One 8 Kword, two 4 Kword, one 16 Kword

and seven 32 Kword sectors (word mode)

- Supports full chip erase

- Individual sector erase supported

- Sector protection:

Hardware locking of sectors to prevent

program or erase operations within individual

sectors

Additionally, temporary Sector Group

Unprotect allows code changes in previously

locked sectors.

•

High performance program/erase speed

- Byte/Word program time: 8µs typical

- Sector erase time: 500ms typical

•

JEDEC Standard program and erase

commands

•

JEDEC standard

DATA

polling and toggle

bits feature

•

Single Sector and Chip Erase

•

Sector Unprotect Mode

•

Embedded Erase and Program Algorithms

•

Erase Suspend / Resume modes:

Read or program another Sector during

Erase Suspend Mode

•

triple-metal double-poly triple-well CMOS

Flash Technology

•

Low Vcc write inhibit < 2.5V

•

>100K program/erase endurance cycle

da0.

•

Package Options

- 48-pin TSOP (Type 1)

- 48-ball 6mm x 8mm FBGA

•

Commercial and Industrial Temperature

Range

GENERAL DESCRIPTION

The EN29LV400 is a 4-Megabit, electrically erasable, read/write non-volatile flash memory,

organized as 524,288 bytes or 256,144 words. Any byte can be programmed typically in 8µs. The

EN29LV400 features 3.0V voltage read and write operation, with access times as fast as 45ns to

eliminate the need for WAIT states in high-performance microprocessor systems.

The EN29LV400 has separate Output Enable (

), Chip Enable (

), and Write Enable (WE)

controls, which eliminate bus contention issues. This device is designed to allow either single

Sector or full chip erase operation, where each Sector can be individually protected against

program/erase operations or temporarily unprotected to erase or program. The device can sustain a

minimum of 100K program/erase cycles on each Sector.

This Data Sheet may be revised by subsequent versions

or modifications due to changes in technical specifications.

Rev. C, Issue Date: 2004/03/18

EN29LV400

CONNECTION DIAGRAMS

A15

A14

A13

A12

A11

A10

WE#

RESET#

RY/BY#

A17

A16

BYTE#

Vss

DQ15/A-1

DQ7

DQ14

DQ6

DQ13

DQ5

DQ12

DQ4

Vcc

DQ11

DQ3

DQ10

DQ2

DQ9

DQ1

DQ8

DQ0

OE#

Vss

CE#

Standard

TSOP

FBGA

Top View, Balls Facing Down

A13

A12

A14

A15

A16

BYTE#

DQ15/A-1

Vss

A10

A11

DQ7

DQ14

DQ13

DQ6

WE#

RESET#

DQ5

DQ12

Vcc

DQ4

RY/BY#

DQ2

DQ10

DQ11

DQ3

A17

DQ0

DQ8

DQ9

DQ1

CE#

OE#

Vss

This Data Sheet may be revised by subsequent versions

or modifications due to changes in technical specifications.

Rev. C, Issue Date: 2004/03/18

EN29LV400

TABLE 1. PIN DESCRIPTION

Pin Name

A0-A17

DQ0-DQ14

DQ15 / A-1

CE#

OE#

RESET#

RY/BY#

WE#

Vcc

Vss

BYTE#

Function

Addresses

15 Data Inputs/Outputs

DQ15 (data input/output, word mode),

A-1 (LSB address input, byte mode)

Chip Enable

Output Enable

Hardware Reset Pin

Ready/Busy Output

Write Enable

Supply Voltage

Ground

Not Connected to anything

Byte/Word Mode

FIGURE 1. LOGIC DIAGRAM

EN29LV400

A0 - A17

DQ0 – DQ15

(A-1)

Reset#

CE#

OE#

WE#

Byte#

RY/BY#

This Data Sheet may be revised by subsequent versions

or modifications due to changes in technical specifications.

Rev. C, Issue Date: 2004/03/18

EN29LV400

TABLE 2A. TOP BOOT BLOCK SECTOR ARCHITECTURE

ADDRESS RANGE

Sector

(X16)

3E000h-3FFFFh

3D000h-3DFFFh

3C000h-3CFFFh

38000h-3BFFFh

30000h-37FFFh

28000h-2FFFFh

20000h-27FFFh

18000h-1FFFFh

10000h-17FFFh

08000h-0FFFFh

00000h-07FFFh

SECTOR

SIZE

(Kbytes /

Kwords)

16/8

8/4

32/16

64/32

A17

A16

A15

A14

A13

A12

(X8)

7C000h-7FFFFh

7A000h-7BFFFh

78000h-79FFFh

70000h – 77FFFh

60000h - 6FFFFh

50000h – 5FFFFh

40000h – 4FFFFh

30000h – 3FFFFh

20000h - 2FFFFh

10000h - 1FFFFh

00000h - 0FFFFh

This Data Sheet may be revised by subsequent versions

or modifications due to changes in technical specifications.

Rev. C, Issue Date: 2004/03/18

EN29LV400

TABLE 2B. BOTTOM BOOT BLOCK SECTOR ARCHITECTURE

ADDRESS RANGE

Sector

(X16)

38000h-3FFFFh

30000h-37FFFh

28000h-2FFFFh

20000h-27FFFh

18000h-1FFFFh

10000h-17FFFh

08000h-0FFFFh

04000h-07FFFh

03000h-03FFFh

02000h-02FFFh

00000h-01FFFh

SECTOR

SIZE

(Kbytes/

Kwords)

64/32

32/16

8/4

16/8

A17

A16

A15

A14

A13

A12

(X8)

70000h –7FFFFh

60000h – 6FFFFh

50000h – 5FFFFh

40000h – 4FFFFh

30000h – 3FFFFh

20000h – 2FFFFh

10000h – 1FFFFh

08000h – 0FFFFh

06000h – 07FFFh

04000h – 05FFFh

00000h – 03FFFh

This Data Sheet may be revised by subsequent versions

or modifications due to changes in technical specifications.

Rev. C, Issue Date: 2004/03/18

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