EEWORLDEEWORLDEEWORLD

Part Number

Search
 PDF

S2512CPY4123F30-W

Description
Fixed Resistor, Metal Glaze/thick Film, 1.5W, 412000ohm, 200V, 1% +/-Tol, 300ppm/Cel, Surface Mount, 2512, CHIP, ROHS COMPLIANT
CategoryPassive components    The resistor   
File Size123KB,1 Pages
ManufacturerState of the Art Inc.
Environmental Compliance  
Download Datasheet Parametric View All

S2512CPY4123F30-W Overview

Fixed Resistor, Metal Glaze/thick Film, 1.5W, 412000ohm, 200V, 1% +/-Tol, 300ppm/Cel, Surface Mount, 2512, CHIP, ROHS COMPLIANT

S2512CPY4123F30-W Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerState of the Art Inc.
package instructionCHIP, ROHS COMPLIANT
Reach Compliance Codecompli
ECCN codeEAR99
structureChi
JESD-609 codee4
Manufacturer's serial numberS2512
Installation featuresSURFACE MOUNT
Number of terminals2
Maximum operating temperature150 °C
Minimum operating temperature-65 °C
Package height0.58 mm
Package length6.35 mm
Package shapeRECTANGULAR PACKAGE
Package formSMT
Package width3.02 mm
method of packingWAFFLE PACK
Rated power dissipation(P)1.5 W
Rated temperature70 °C
resistance412000 Ω
Resistor typeFIXED RESISTOR
series2512(STD)-THICK FILM
size code2512
surface mountYES
technologyMETAL GLAZE/THICK FILM
Temperature Coefficient300 ppm/°C
Terminal surfaceSilver (Ag) - with Nickel (Ni) barrie
Terminal shapeWRAPAROUND
Tolerance1%
Operating Voltage200 V

Recommended Resources

FAQ_How to test Mesh low power nodes
Author: Lucien KUANG, ST engineerClick to download the pdf document to view:Keywords: BlueNRG-1, BlueNRG-2, Mesh, low power consumptionQuestion: After getting our boards, many friends want to know whe...
nmg ST - Low Power RF
STM32F207
Our company has authentic original factory order (Mouser) stm32f207vet6 1000pcs price preferential, WeChat 1875387499...
chlegay stm32/stm8
How to Suppress Zero Drift in Direct-Coupled Amplifier Circuits
0 Introduction Direct coupling is the simplest way to connect stages. It is to directly connect the input of the latter stage with the output of the previous stage. The coupling method in which the ou...
led2015 Power technology
FPGA Implementation of Digital Signal Processing.pdf
FPGA Implementation of Digital Signal Processing.pdf...
zxopenljx EE_FPGA Learning Park
Phase-Locked Loop (PLL) Basics
Phase-Locked Loop (PLL) Basics A phase-locked loop is a feedback system in which a voltage-controlled oscillator (VCO) and a phase comparator are connected so that the oscillator can maintain a consta...
qwqwqw2088 Analogue and Mixed Signal
Mir MYC-YT507 development board review: review video summary
Mir MYC-YT507 development board review: unboxing, onboard resources introduction and mirroring experienceMir MYC-YT507 development board review: Play NES games with the FamicomMir MYC-YT507 developmen...
qinyunti Domestic Chip Exchange

Popular Articles

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2024 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号