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LF398FE

Description
IC SAMPLE AND HOLD AMPLIFIER, 20 us ACQUISITION TIME, CDIP8, 0.300 INCH, CERDIP-8, Sample and Hold Circuit
CategoryAnalog mixed-signal IC    Amplifier circuit   
File Size73KB,5 Pages
ManufacturerNXP
Websitehttps://www.nxp.com
Related ProductsFound16parts with similar functions to LF398FE
Download Datasheet Parametric Compare View All

LF398FE Overview

IC SAMPLE AND HOLD AMPLIFIER, 20 us ACQUISITION TIME, CDIP8, 0.300 INCH, CERDIP-8, Sample and Hold Circuit

LF398FE Parametric

Parameter NameAttribute value
MakerNXP
Parts packaging codeDIP
package instructionDIP,
Contacts8
Reach Compliance Codeunknown
ECCN codeEAR99
Nominal acquisition time20 µs
Amplifier typeSAMPLE AND HOLD CIRCUIT
Maximum analog input voltage11.5 V
Minimum analog input voltage-11.5 V
JESD-30 codeR-GDIP-T8
length9.955 mm
Negative supply voltage upper limit-18 V
Nominal Negative Supply Voltage (Vsup)-15 V
Number of functions1
Number of terminals8
Maximum operating temperature70 °C
Minimum operating temperature
Package body materialCERAMIC, GLASS-SEALED
encapsulated codeDIP
Package shapeRECTANGULAR
Package formIN-LINE
Certification statusNot Qualified
Sample and hold/Track and holdSAMPLE
Maximum seat height5.08 mm
Maximum slew rate6.5 mA
Supply voltage upper limit18 V
Nominal supply voltage (Vsup)15 V
surface mountNO
technologyJFET
Temperature levelCOMMERCIAL
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
width7.62 mm

LF398FE Related Products

LF398FE LF298N LF298FE LF198FE
Description IC SAMPLE AND HOLD AMPLIFIER, 20 us ACQUISITION TIME, CDIP8, 0.300 INCH, CERDIP-8, Sample and Hold Circuit IC SAMPLE AND HOLD AMPLIFIER, 20 us ACQUISITION TIME, PDIP8, 0.300 INCH, PLASTIC, DIP-8, Sample and Hold Circuit IC SAMPLE AND HOLD AMPLIFIER, 20 us ACQUISITION TIME, CDIP8, 0.300 INCH, CERDIP-8, Sample and Hold Circuit IC SAMPLE AND HOLD AMPLIFIER, 20 us ACQUISITION TIME, CDIP8, 0.300 INCH, CERDIP-8, Sample and Hold Circuit
Maker NXP NXP NXP NXP
Parts packaging code DIP DIP DIP DIP
package instruction DIP, DIP, DIP, DIP,
Contacts 8 8 8 8
Reach Compliance Code unknown unknown unknown unknow
ECCN code EAR99 EAR99 EAR99 EAR99
Nominal acquisition time 20 µs 20 µs 20 µs 20 µs
Amplifier type SAMPLE AND HOLD CIRCUIT SAMPLE AND HOLD CIRCUIT SAMPLE AND HOLD CIRCUIT SAMPLE AND HOLD CIRCUIT
Maximum analog input voltage 11.5 V 11.5 V 11.5 V 11.5 V
Minimum analog input voltage -11.5 V -11.5 V -11.5 V -11.5 V
JESD-30 code R-GDIP-T8 R-PDIP-T8 R-GDIP-T8 R-GDIP-T8
length 9.955 mm 9.41 mm 9.955 mm 9.955 mm
Negative supply voltage upper limit -18 V -18 V -18 V -18 V
Nominal Negative Supply Voltage (Vsup) -15 V -15 V -15 V -15 V
Number of functions 1 1 1 1
Number of terminals 8 8 8 8
Maximum operating temperature 70 °C 85 °C 85 °C 125 °C
Minimum operating temperature - -25 °C -25 °C -55 °C
Package body material CERAMIC, GLASS-SEALED PLASTIC/EPOXY CERAMIC, GLASS-SEALED CERAMIC, GLASS-SEALED
encapsulated code DIP DIP DIP DIP
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form IN-LINE IN-LINE IN-LINE IN-LINE
Certification status Not Qualified Not Qualified Not Qualified Not Qualified
Sample and hold/Track and hold SAMPLE SAMPLE SAMPLE SAMPLE
Maximum seat height 5.08 mm 4.06 mm 5.08 mm 5.08 mm
Supply voltage upper limit 18 V 18 V 18 V 18 V
Nominal supply voltage (Vsup) 15 V 15 V 15 V 15 V
surface mount NO NO NO NO
technology JFET BIFET JFET JFET
Temperature level COMMERCIAL OTHER OTHER MILITARY
Terminal form THROUGH-HOLE THROUGH-HOLE THROUGH-HOLE THROUGH-HOLE
Terminal pitch 2.54 mm 2.54 mm 2.54 mm 2.54 mm
Terminal location DUAL DUAL DUAL DUAL
width 7.62 mm 7.62 mm 7.62 mm 7.62 mm
Maximum slew rate 6.5 mA - 5.5 mA 5.5 mA

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