TC74HCT74AF-TP1EL datasheet, PDF

Datasheet> All Categories > logic> logic> TC74HCT74AF-TP1EL

TC74HCT74AF-TP1EL: DescriptionIC HCT SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14, 0.300 INCH, PLASTIC, SOIC-14, FF/Latch; Categorylogic logic; File Size94KB，4 Pages; ManufacturerToshiba Semiconductor; Websitehttp://toshiba-semicon-storage.com/

Download Datasheet Parametric Compare View All

TC74HCT74AF-TP1EL Overview

IC HCT SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14, 0.300 INCH, PLASTIC, SOIC-14, FF/Latch

TC74HCT74AF-TP1EL Parametric

Parameter Name	Attribute value
Maker	Toshiba Semiconductor
Parts packaging code	SOIC
package instruction	SOP,
Contacts	14
Reach Compliance Code	unknown
series	HCT
JESD-30 code	R-PDSO-G14
length	10.3 mm
Load capacitance (CL)	50 pF
Logic integrated circuit type	D FLIP-FLOP
Number of digits	1
Number of functions	2
Number of terminals	14
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Output polarity	COMPLEMENTARY
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
propagation delay (tpd)	41 ns
Certification status	Not Qualified
Maximum seat height	1.9 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
Trigger type	POSITIVE EDGE
width	5.3 mm
minfmax	22 MHz

TC74HCT74AF-TP1EL Related Products

	TC74HCT74AF-TP1EL	TC74HCT74AF-TP2	TC74HCT74AF-TP2EL	TC74HCT74AF-EL	TC74HCT74AF-TP1
Description	IC HCT SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14, 0.300 INCH, PLASTIC, SOIC-14, FF/Latch	IC HCT SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14, 0.300 INCH, PLASTIC, SOIC-14, FF/Latch	IC HCT SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14, 0.300 INCH, PLASTIC, SOIC-14, FF/Latch	IC HCT SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14, 0.300 INCH, PLASTIC, SOIC-14, FF/Latch	IC HCT SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14, 0.300 INCH, PLASTIC, SOIC-14, FF/Latch
Maker	Toshiba Semiconductor	Toshiba Semiconductor	Toshiba Semiconductor	Toshiba Semiconductor	Toshiba Semiconductor
Parts packaging code	SOIC	SOIC	SOIC	SOIC	SOIC
package instruction	SOP,	SOP,	SOP,	SOP,	SOP,
Contacts	14	14	14	14	14
Reach Compliance Code	unknown	unknown	unknown	unknown	unknown
series	HCT	HCT	HCT	HCT	HCT
JESD-30 code	R-PDSO-G14	R-PDSO-G14	R-PDSO-G14	R-PDSO-G14	R-PDSO-G14
length	10.3 mm	10.3 mm	10.3 mm	10.3 mm	10.3 mm
Load capacitance (CL)	50 pF	50 pF	50 pF	50 pF	50 pF
Logic integrated circuit type	D FLIP-FLOP	D FLIP-FLOP	D FLIP-FLOP	D FLIP-FLOP	D FLIP-FLOP
Number of digits	1	1	1	1	1
Number of functions	2	2	2	2	2
Number of terminals	14	14	14	14	14
Maximum operating temperature	85 °C	85 °C	85 °C	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C
Output polarity	COMPLEMENTARY	COMPLEMENTARY	COMPLEMENTARY	COMPLEMENTARY	COMPLEMENTARY
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	SOP	SOP	SOP	SOP	SOP
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE	SMALL OUTLINE
propagation delay (tpd)	41 ns	41 ns	41 ns	41 ns	41 ns
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	1.9 mm	1.9 mm	1.9 mm	1.9 mm	1.9 mm
Maximum supply voltage (Vsup)	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V
Minimum supply voltage (Vsup)	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V
Nominal supply voltage (Vsup)	5 V	5 V	5 V	5 V	5 V
surface mount	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
Terminal form	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING
Terminal pitch	1.27 mm	1.27 mm	1.27 mm	1.27 mm	1.27 mm
Terminal location	DUAL	DUAL	DUAL	DUAL	DUAL
Trigger type	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE	POSITIVE EDGE
width	5.3 mm	5.3 mm	5.3 mm	5.3 mm	5.3 mm
minfmax	22 MHz	22 MHz	22 MHz	22 MHz	22 MHz
Is it Rohs certified?	-	incompatible	-	incompatible	incompatible
JESD-609 code	-	e0	e2	e0	e0
Peak Reflow Temperature (Celsius)	-	240	-	240	240
Terminal surface	-	TIN LEAD	TIN COPPER/TIN SILVER	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)
Maximum time at peak reflow temperature	-	NOT SPECIFIED	-	NOT SPECIFIED	NOT SPECIFIED

Recommended Resources

Night telephone service light circuit (1)

Control circuit using NE555 integrated circuit_2

555 water level controller

555 simple leakage detector circuit

555 film tank display and exposure timer circuit

spike generator circuit

From GPS to RFID, the growing number of positioning technologies: [Abstract] Finding what you need among many similar things is a problem that many people often encounter in life. For example, the trouble I often encounter when I go to school is: finding my own bicy...; tmily RF/Wirelessly

Reflections caused by changes in trace width in PCB design: [p=null, 2, left][color=rgb(51, 51, 51)][font=微软雅黑, Helvetica, STHeiTi, sans-seri]When routing a PCB, it often happens that when the trace passes through a certain area, due to the limited routing spa...; jdbpcb00 PCB Design

EEWORLD University Hall----Automatic Control Theory Tsinghua University: Automatic Control Theory Tsinghua University : https://training.eeworld.com.cn/course/5409Automatic control theory is a core professional basic course in automation discipline and is also the theoreti...; JFET Industrial Control Electronics

The new week's evaluation information has been sent to ~: Hi, everyone~ The new week's evaluation information has been sent to you~ Please receive it~ In the past week, a new evaluation activity has been launched~~ Let me tell you secretly that with the effo...; okhxyyo Special Edition for Assessment Centres

Passive filter circuit: Disadvantages of passive filters: poor load capacity, no amplification effect, unsatisfactory characteristics, shallow edges, and mutual influence of various levels. RC Filtering1. Selection of C valu...; Jacktang Analogue and Mixed Signal

28XXDSP code compilation problem under CCS: DelayMs(Uint16 t) is a function that uses the 2812 timer for delay. The timer interrupt decrements the global variable timedelay by 1 every 1ms (if it is 0, it will not be decremented). When timedelay...; 灞波儿奔 DSP and ARM Processors

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components