NS32819V-80 datasheet, PDF - EEWORLD Datasheet

NS32819V-80: DescriptionIC 256K X 1, DRAM CONTROLLER, PQCC64, PLASTIC, LCC-68, Memory Controller; CategoryThe embedded processor and controller Microcontrollers and processors; File Size970KB，25 Pages; ManufacturerNational Semiconductor（TI ）; Websitehttp://www.ti.com

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NS32819V-80 Overview

IC 256K X 1, DRAM CONTROLLER, PQCC64, PLASTIC, LCC-68, Memory Controller

Parameter Name	Attribute value
Maker	National Semiconductor（TI ）
package instruction	QCCJ,
Reach Compliance Code	unknown
Address bus width	18
boundary scan	NO
maximum clock frequency	80 MHz
External data bus width
JESD-30 code	S-PQCC-J64
length	24.2316 mm
low power mode	NO
memory organization	256K X 1
Number of blocks	4
Number of terminals	64
Maximum operating temperature	70 °C
Minimum operating temperature
Package body material	PLASTIC/EPOXY
encapsulated code	QCCJ
Package shape	SQUARE
Package form	CHIP CARRIER
Certification status	Not Qualified
Maximum seat height	5.08 mm
Maximum slew rate	240 mA
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	YES
technology	BIPOLAR
Temperature level	COMMERCIAL
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	QUAD
width	24.2316 mm
uPs/uCs/peripheral integrated circuit type	MEMORY CONTROLLER, DRAM

Shortcut: L0 L1 L2 L3 L4 L5 L6 L7 L8 L9 LA LB LC LD LE LF LG LH LI LJ LK LL LM LN LO LP LQ LR LS LT LU LV LW LX LY LZ M0 M1 M2 M3 M4 M5 M6 M7 M8 M9 MA MB MC MD ME MF MG MH MI MJ MK ML MM MN MO MP MQ MR MS MT MU MV MW MX MY MZ N0 N1 N2 N3 N4 N5 N6 N7 N8 NA NB NC ND NE NF NG NH NI NJ NK NL NM NN NO NP NQ NR NS NT NU NV NX NZ O0 O1 O2 O3 OA OB OC OD OE OF OG OH OI OJ OK OL OM ON OP OQ OR OS OT OV OX OY OZ P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 PA PB PC PD PE PF PG PH PI PJ PK PL PM PN PO PP PQ PR PS PT PU PV PW PX PY PZ Q1 Q2 Q3 Q4 Q5 Q6 Q8 Q9 QA QB QC QE QF QG QH QK QL QM QP QR QS QT QV QW QX QY R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 RA RB RC RD RE RF RG RH RI RJ RK RL RM RN RO RP RQ RR RS RT RU RV RW RX RY RZ

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