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AM29C660C/BZC

Description
Error Detection And Correction Circuit, CMOS Series, 32-Bit, CMOS, CPGA68, CERAMIC, PGA-68
Categorylogic    logic   
File Size1MB,40 Pages
ManufacturerAMD
Websitehttp://www.amd.com
Download Datasheet Parametric Compare View All

AM29C660C/BZC Overview

Error Detection And Correction Circuit, CMOS Series, 32-Bit, CMOS, CPGA68, CERAMIC, PGA-68

AM29C660C/BZC Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
Parts packaging codePGA
package instructionPGA, PGA68,11X11
Contacts68
Reach Compliance Codeunknown
Other featuresBUILT IN DIAGNOSTICS; BYTE CONTROL
seriesCMOS
JESD-30 codeS-CPGA-P68
JESD-609 codee0
length29.464 mm
Load capacitance (CL)50 pF
Logic integrated circuit typeERROR DETECTION AND CORRECTION CIRCUIT
Number of digits32
Number of functions1
Number of terminals68
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Output characteristics3-STATE
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codePGA
Encapsulate equivalent codePGA68,11X11
Package shapeSQUARE
Package formGRID ARRAY
Peak Reflow Temperature (Celsius)NOT SPECIFIED
propagation delay (tpd)29 ns
Certification statusNot Qualified
Filter level38535Q/M;38534H;883B
Maximum seat height4.953 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyCMOS
Temperature levelMILITARY
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formPIN/PEG
Terminal pitch2.54 mm
Terminal locationPERPENDICULAR
Maximum time at peak reflow temperatureNOT SPECIFIED
width29.464 mm
Base Number Matches1

AM29C660C/BZC Related Products

AM29C660C/BZC AM29C660AJC AM29C660BJC AM29C660CJC AM29C660EJC AM29C660CGC AM29C660BGC AM29C660AGC AM29C660GC AM29C660EGC
Description Error Detection And Correction Circuit, CMOS Series, 32-Bit, CMOS, CPGA68, CERAMIC, PGA-68 Error Detection And Correction Circuit, CMOS Series, 32-Bit, CMOS, PQCC68, PLASTIC, LCC-68 Error Detection And Correction Circuit, CMOS Series, 32-Bit, CMOS, PQCC68, PLASTIC, LCC-68 Error Detection And Correction Circuit, CMOS Series, 32-Bit, CMOS, PQCC68, PLASTIC, LCC-68 Error Detection And Correction Circuit, CMOS Series, 32-Bit, CMOS, PQCC68, PLASTIC, LCC-68 Error Detection And Correction Circuit, CMOS Series, 32-Bit, CMOS, CPGA68, PGA-68 Error Detection And Correction Circuit, CMOS Series, 32-Bit, CMOS, CPGA68, PGA-68 Error Detection And Correction Circuit, CMOS Series, 32-Bit, CMOS, CPGA68, PGA-68 Error Detection And Correction Circuit, CMOS Series, 32-Bit, CMOS, CPGA68, PGA-68 Error Detection And Correction Circuit, CMOS Series, 32-Bit, CMOS, CPGA68, PGA-68
Is it Rohs certified? incompatible incompatible incompatible incompatible incompatible incompatible incompatible incompatible incompatible incompatible
Parts packaging code PGA LCC LCC LCC LCC PGA PGA PGA PGA PGA
package instruction PGA, PGA68,11X11 QCCJ, LDCC68,1.0SQ QCCJ, LDCC68,1.0SQ QCCJ, LDCC68,1.0SQ QCCJ, LDCC68,1.0SQ PGA, PGA68,11X11 PGA, PGA68,11X11 PGA, PGA68,11X11 PGA, PGA68,11X11 PGA, PGA68,11X11
Contacts 68 68 68 68 68 68 68 68 68 68
Reach Compliance Code unknown unknow unknow unknow unknow unknown unknown unknown unknown unknown
Other features BUILT IN DIAGNOSTICS; BYTE CONTROL BUILT IN DIAGNOSTICS; BYTE CONTROL BUILT IN DIAGNOSTICS; BYTE CONTROL BUILT IN DIAGNOSTICS; BYTE CONTROL BUILT IN DIAGNOSTICS; BYTE CONTROL BUILT IN DIAGNOSTICS; BYTE CONTROL BUILT IN DIAGNOSTICS; BYTE CONTROL BUILT IN DIAGNOSTICS; BYTE CONTROL BUILT IN DIAGNOSTICS; BYTE CONTROL BUILT IN DIAGNOSTICS; BYTE CONTROL
series CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS
JESD-30 code S-CPGA-P68 S-PQCC-J68 S-PQCC-J68 S-PQCC-J68 S-PQCC-J68 S-CPGA-P68 S-CPGA-P68 S-CPGA-P68 S-CPGA-P68 S-CPGA-P68
JESD-609 code e0 e0 e0 e0 e0 e0 e0 e0 e0 e0
length 29.464 mm 24.2062 mm 24.2062 mm 24.2062 mm 24.2062 mm 29.464 mm 29.464 mm 29.464 mm 29.464 mm 29.464 mm
Logic integrated circuit type ERROR DETECTION AND CORRECTION CIRCUIT ERROR DETECTION AND CORRECTION CIRCUIT ERROR DETECTION AND CORRECTION CIRCUIT ERROR DETECTION AND CORRECTION CIRCUIT ERROR DETECTION AND CORRECTION CIRCUIT ERROR DETECTION AND CORRECTION CIRCUIT ERROR DETECTION AND CORRECTION CIRCUIT ERROR DETECTION AND CORRECTION CIRCUIT ERROR DETECTION AND CORRECTION CIRCUIT ERROR DETECTION AND CORRECTION CIRCUIT
Number of digits 32 32 32 32 32 32 32 32 32 32
Number of functions 1 1 1 1 1 1 1 1 1 1
Number of terminals 68 68 68 68 68 68 68 68 68 68
Maximum operating temperature 125 °C 70 °C 70 °C 70 °C 70 °C 70 °C 70 °C 70 °C 70 °C 70 °C
Output characteristics 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE
Package body material CERAMIC, METAL-SEALED COFIRED PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED
encapsulated code PGA QCCJ QCCJ QCCJ QCCJ PGA PGA PGA PGA PGA
Encapsulate equivalent code PGA68,11X11 LDCC68,1.0SQ LDCC68,1.0SQ LDCC68,1.0SQ LDCC68,1.0SQ PGA68,11X11 PGA68,11X11 PGA68,11X11 PGA68,11X11 PGA68,11X11
Package shape SQUARE SQUARE SQUARE SQUARE SQUARE SQUARE SQUARE SQUARE SQUARE SQUARE
Package form GRID ARRAY CHIP CARRIER CHIP CARRIER CHIP CARRIER CHIP CARRIER GRID ARRAY GRID ARRAY GRID ARRAY GRID ARRAY GRID ARRAY
Peak Reflow Temperature (Celsius) NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
Certification status Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
Maximum seat height 4.953 mm 4.572 mm 4.572 mm 4.572 mm 4.572 mm 4.953 mm 4.953 mm 4.953 mm 4.953 mm 4.953 mm
Maximum supply voltage (Vsup) 5.5 V 5.25 V 5.25 V 5.25 V 5.25 V 5.25 V 5.25 V 5.25 V 5.25 V 5.25 V
Minimum supply voltage (Vsup) 4.5 V 4.75 V 4.75 V 4.75 V 4.75 V 4.75 V 4.75 V 4.75 V 4.75 V 4.75 V
Nominal supply voltage (Vsup) 5 V 5 V 5 V 5 V 5 V 5 V 5 V 5 V 5 V 5 V
surface mount NO YES YES YES YES NO NO NO NO NO
technology CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS
Temperature level MILITARY COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL
Terminal surface Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
Terminal form PIN/PEG J BEND J BEND J BEND J BEND PIN/PEG PIN/PEG PIN/PEG PIN/PEG PIN/PEG
Terminal pitch 2.54 mm 1.27 mm 1.27 mm 1.27 mm 1.27 mm 2.54 mm 2.54 mm 2.54 mm 2.54 mm 2.54 mm
Terminal location PERPENDICULAR QUAD QUAD QUAD QUAD PERPENDICULAR PERPENDICULAR PERPENDICULAR PERPENDICULAR PERPENDICULAR
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
width 29.464 mm 24.2062 mm 24.2062 mm 24.2062 mm 24.2062 mm 29.464 mm 29.464 mm 29.464 mm 29.464 mm 29.464 mm
Load capacitance (CL) 50 pF 50 pF 50 pF 50 pF - 50 pF 50 pF 50 pF 50 pF -
propagation delay (tpd) 29 ns 36 ns 30 ns 24 ns - 24 ns 30 ns 36 ns 49 ns -
Base Number Matches 1 1 1 1 1 1 1 1 - -

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