Macronix is a global leader in non-volatile memory integrated components, providing ROM read-only memory, NOR flash memory and NAND flash memory solutions across a wide range of specifications and capacities. With world-class R&D and manufacturing capabilities, Macronix provides the highest quality, innovative and high-performance products for customers to apply in consumer, communications, computers, automotive electronics, network communications and other fields.
• Multi I/O Support - Single I/O, Dual I/O and Quad I/O
• Hold Feature
• Program Suspend/Resume & Erase Suspend/Resume
P/N: PM2305
1
Rev. 1.2, October 18, 2016
MX25L6436F
Contents
1. FEATURES ........................................................................................................................................................ 4
2. GENERAL DESCRIPTION ............................................................................................................................... 5
6. DATA PROTECTION.......................................................................................................................................... 8
Table 1. Protected Area Sizes ................................................................................................................9
9. HOLD FEATURE.............................................................................................................................................. 13
11. POWER-ON STATE ....................................................................................................................................... 73
15. ERASE AND PROGRAMMING PERFORMANCE ........................................................................................ 84
16. DATA RETENTION ........................................................................................................................................ 84
18. ORDERING INFORMATION .......................................................................................................................... 85
19. PART NAME DESCRIPTION ......................................................................................................................... 86
20. PACKAGE INFORMATION ............................................................................................................................ 87
21. REVISION HISTORY ..................................................................................................................................... 88
P/N: PM2305
3
Rev. 1.2, October 18, 2016
MX25L6436F
64M-BIT [x 1 / x 2 / x 4] CMOS MXSMIO
®
(SERIAL MULTI I/O)
FLASH MEMORY
1. FEATURES
GENERAL
• Supports Serial Peripheral Interface -- Mode 0
and Mode 3
•
67,108,864 x 1 bit structure
or 33,554,432 x 2 bits (two I/O read mode)
structure
or 16,777,216 x 4 bits (four I/O mode) structure
• 2048 Equal Sectors with 4K bytes each
- Any Sector can be erased individually
• 256 Equal Blocks with 32K bytes each
- Any Block can be erased individually
• 128 Equal Blocks with 64K bytes each
- Any Block can be erased individually
• Power Supply Operation
- 2.65 to 3.6 volt for read, erase, and program
operations
• Latch-up protected to 100mA from -1V to Vcc
+1V
PERFORMANCE
• High Performance
VCC = 2.65~3.6V
- Normal read
- 50MHz
- Fast read
- FAST_READ, DREAD, QREAD: 133MHz
with 8 dummy cycles
- 2READ: 80MHz with 4 dummy cycle,
133MHz with 8 dummy cycle
- 4READ: 80MHz with 6 dummy cycle,
133MHz with 10 dummy cycle
- Configurable dummy cycle number for
2READ and 4READ operation
- 8/16/32/64 byte Wrap-Around Burst Read
Mode
• Low Power Consumption
• Typical 100,000 erase/program cycles
• 20 years data retention
SOFTWARE FEATURES
•
Input Data Format
-
1-byte Command code
•
Advanced Security Features
- Special Block lock protection
The BP0-BP3 and T/B status bits define the size of
the area to be protected against program and erase
instructions
•
Additional 8K-bit bit security OTP
-
Features unique identifier
-
Factory locked identifiable, and customer lockable
•
Auto Erase and Auto Program Algorithms
-
Automatically erases and verifies data at selected
sector
-
Automatically programs and verifies data at selected
page by an internal algorithm that automatically
times the program pulse width (Any page to be pro-
grammed should have page in the erased state first.)
•
Status Register Feature
•
Command Reset
•
Program/Erase Suspend
•
Program/Erase Resume
•
Electronic Identification
-
JEDEC 1-byte Manufacturer ID and 2-byte Device ID
- RES command for 1-byte Device ID
•
Support Serial Flash Discoverable Parameters (SFDP)
mode
HARDWARE FEATURES
•
SCLK Input
• SI/SIO0
-
Serial Data Input or Serial Data Input/Output for 2 x I/
O mode or Serial Data Input/Output for 4 x I/O mode
• SO/SIO1
-
Serial Data Output or Serial Data Input/Output for 2 x
I/O mode or Serial Data Input/Output for 4 x I/O mode
• WP#/SIO2
-
Hardware write protection or serial data Input/Output
for 4 x I/O mode
• HOLD#/SIO3
-
To pause the device without deselecting the device or
serial data Input/Output for 4 x I/O mode
• PACKAGE
-
8-pin SOP (200mil)
-
All devices are RoHS Compliant and Halogen-free
-
Serial clock input
P/N: PM2305
4
Rev. 1.2, October 18, 2016
MX25L6436F
2. GENERAL DESCRIPTION
MX25L6436F is 64Mb bits Serial NOR Flash memory, which is configured as 8,388,608 x 8 internally. When it is
in four I/O mode, the structure becomes 16,777,216 bits x 4. When it is in two I/O mode, the structure becomes
33,554,432 bits x 2.
MX25L6436F features a serial peripheral interface and software protocol allowing operation on a simple 3-wire
bus while it is in single I/O mode. The three bus signals are a clock input (SCLK), a serial data input (SI), and a
serial data output (SO).
Serial
access to the device is enabled by CS# input.
MX25L6436F, MXSMIO
®
(Serial Multi I/O) flash memory, provides sequential read operation on the whole chip
and multi-I/O features.
When it is in quad I/O mode, the SI pin, SO pin, WP# pin and HOLD# pin become SIO0 pin, SIO1 pin, SIO2 pin
and SIO3 pin for address/dummy bits input and data Input/Output.
After program/erase command is issued, auto program/erase algorithms which program/erase and verify the
specified page or sector/block locations will be executed. Program command is executed on byte basis, or page (256
bytes) basis. Erase command is executed on 4K-byte sector, 32K-byte/64K-byte block, or whole chip basis.
To provide user with ease of interface, a status register is included to indicate the status of the chip. The status
read command can be issued to detect completion status of a program or erase operation via WIP bit.
When the device is not in operation and CS# is high, it is put in standby mode.
The MX25L6436F utilizes Macronix's proprietary memory cell, which reliably stores memory contents even after
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