64M X 72 DDR DRAM, PBGA208
| Parameter Name | Attribute value |
| Is it Rohs certified? | incompatible |
| Maker | White Electronic Designs Corporation |
| package instruction | BGA, |
| Reach Compliance Code | unknow |
| access mode | MULTI BANK PAGE BURST |
| Maximum access time | 0.5 ns |
| Other features | AUTO/SELF REFRESH |
| JESD-30 code | R-PBGA-B208 |
| memory density | 4831838208 bi |
| Memory IC Type | DDR DRAM |
| memory width | 72 |
| Number of functions | 1 |
| Number of ports | 1 |
| Number of terminals | 208 |
| word count | 67108864 words |
| character code | 64000000 |
| Operating mode | SYNCHRONOUS |
| organize | 64MX72 |
| Package body material | PLASTIC/EPOXY |
| encapsulated code | BGA |
| Package shape | RECTANGULAR |
| Package form | GRID ARRAY |
| Peak Reflow Temperature (Celsius) | NOT SPECIFIED |
| Certification status | Not Qualified |
| Maximum seat height | 3.64 mm |
| self refresh | YES |
| Maximum supply voltage (Vsup) | 1.9 V |
| Minimum supply voltage (Vsup) | 1.7 V |
| Nominal supply voltage (Vsup) | 1.8 V |
| surface mount | YES |
| technology | CMOS |
| Terminal form | BALL |
| Terminal pitch | 1 mm |
| Terminal location | BOTTOM |
| Maximum time at peak reflow temperature | NOT SPECIFIED |
EEWorld
subscription
account
EEWorld
service
account
Automotive
development
circle
京公网安备 11010802033920号
EEWORLD