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LFE2M35SE-5FN672I

Description
FPGA - Field Programmable Gate Array 34K LUTs S-Ser SERDE S Mem DSP 1.2V -5 I
CategoryProgrammable logic devices    Programmable logic   
File Size16MB,771 Pages
ManufacturerLattice
Websitehttp://www.latticesemi.com
Environmental Compliance
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FPGA - Field Programmable Gate Array 34K LUTs S-Ser SERDE S Mem DSP 1.2V -5 I

LFE2M35SE-5FN672I Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerLattice
Parts packaging codeBGA
package instructionFPBGA-672
Contacts672
Reach Compliance Codecompliant
ECCN codeEAR99
maximum clock frequency311 MHz
Combined latency of CLB-Max0.358 ns
JESD-30 codeS-PBGA-B672
JESD-609 codee1
length27 mm
Humidity sensitivity level3
Number of entries410
Number of logical units34000
Output times410
Number of terminals672
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeBGA
Encapsulate equivalent codeBGA672,26X26,40
Package shapeSQUARE
Package formGRID ARRAY
Peak Reflow Temperature (Celsius)250
power supply1.2 V
Programmable logic typeFIELD PROGRAMMABLE GATE ARRAY
Certification statusNot Qualified
Maximum seat height2.6 mm
Maximum supply voltage1.26 V
Minimum supply voltage1.14 V
Nominal supply voltage1.2 V
surface mountYES
Temperature levelINDUSTRIAL
Terminal surfaceTin/Silver/Copper (Sn96.5Ag3.0Cu0.5)
Terminal formBALL
Terminal pitch1 mm
Terminal locationBOTTOM
Maximum time at peak reflow temperature30
width27 mm

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Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
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