7130SA100JG8 datasheet, PDF - EEWORLD Datasheet

7130SA100JG8: DescriptionDual-Port SRAM, 1KX8, 100ns, CMOS, PQCC52, 0.750 X 0.750 INCH, 0.170 INCH HEIGHT, GREEN, PLASTIC, LCC-52; Categorystorage storage; File Size246KB，21 Pages; ManufacturerIDT (Integrated Device Technology); Environmental Compliance

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7130SA100JG8 Overview

Dual-Port SRAM, 1KX8, 100ns, CMOS, PQCC52, 0.750 X 0.750 INCH, 0.170 INCH HEIGHT, GREEN, PLASTIC, LCC-52

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	IDT (Integrated Device Technology)
Parts packaging code	LCC
package instruction	QCCJ, LDCC52,.8SQ
Contacts	52
Reach Compliance Code	compliant
Is Samacsys	N
Maximum access time	100 ns
I/O type	COMMON
JESD-30 code	S-PQCC-J52
JESD-609 code	e3
memory density	8192 bit
Memory IC Type	DUAL-PORT SRAM
memory width	8
Humidity sensitivity level	1
Number of functions	1
Number of ports	2
Number of terminals	52
word count	1024 words
character code	1000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	1KX8
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	QCCJ
Encapsulate equivalent code	LDCC52,.8SQ
Package shape	SQUARE
Package form	CHIP CARRIER
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	260
power supply	5 V
Certification status	Not Qualified
Maximum standby current	0.015 A
Minimum standby current	4.5 V
Maximum slew rate	0.155 mA
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Matte Tin (Sn) - annealed
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	30
Base Number Matches	1

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