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Cannot read data when using AXI to I2Cip core in vivado [Copy link]

This post was last edited by swaggy on 2018-5-31 10:44 I need to connect a temperature sensor ADT7420 that uses I2C timing to the AHB bus. _t ; assign iic_rtl_scl_i = SCL; assign iic_rtl_sda_i = SDA; SENSOR_T SENSOR_T( .HSEL(hsel_t), .HCLK(fclk), .HRESETn(reg_sys_rst_n), .HREADY(hreadys), .HADDR(haddrs), .HTRANS(htranss), .HWRITE(hwrites), .HSIZE(hsizes), .HWDATA(hwdatas), .HREADYOUT(hreadyout_t), .HRDATA(hrdata_t), // .SCL(SCL), // .SDA(SDA) .iic_rtl_scl_i(iic_rtl_scl_i), .iic_rtl_sda_i(iic_rtl_sda_i), .iic_rtl_scl_o(iic_rtl_scl_o), .iic_rtl_sda_o(iic_rtl_sda_o), .iic_rtl_scl_t(iic_rtl_scl_t), .iic_rtl_sda_t(iic_rtl_sda_t) ); The input and output interface of i2c is as follows: What is the relationship between these inputs and outputs? According to the operation sequence in the use document, I used the working mode of dynamic logic controller flow and configured it as above on Keil, #include
#define LED *(unsigned int *) 0x50000000 #define TEM_ISR 0x51000020 #define TEM_CR 0x5100100 #define TEM_IER 0x51000028 #define TEM_SR 0x51000104 #define TEM_TX_FIFO 0x51000108 #define TEM_RX_FIFO 0x5100010C #define TEM_RX_PIRQ 0x51000120 #define TEM_RX_FIFO_OCY 0x51000118 #define TEM_TX_FIFO_OCY 0x51000114 void delay(uint32_t y); int main(void) { static uint8_t i = 0; static uint8_t l=0x01; volatile uint32_t temp = 0; volatile uint32_t temp1 = 0; while(1){ *(unsigned int *) TEM_IER=0xFF; *(unsigned int *) TEM_RX_PIRQ=0x0F; *(unsigned int *)TEM_CR|= 0x2; *(uint32_t *) TEM_TX_FIFO =0x197; *(uint32_t *) TEM_TX_FIFO =0x201; //temp = *(unsigned int *) TEM_RX_FIFO; LED =0x55; temp=*(unsigned int *)TEM_IER; //temp=1; //temp1=*( unsigned int *) TEM_ISR; //delay(10); *(unsigned int *)TEM_CR|=0x4; delay(10); //temp1=*(unsigned int *) TEM_ISR; //temp1=*(unsigned int *) TEM_ISR; do{ temp1=*(unsigned int *) TEM_ISR; }while((temp1 & 0x8)==0); * (unsigned int *) TEM_CR=0x00000010; temp = *(unsigned int *) TEM_RX_FIFO; delay(100); l=l<<1; if(l==0){ l=0x01; } i++; } } When debugging, no waveform appears on scl and sda. Attached is the usage document of axi iic. https://en.eeworld.com/bbs/forum.php?mod=attachment&aid=MzU3MjMzfDU1ODFmNjJhZTcxZWUwZTVkMmI0NmQwNzI5ODQxMTI0fDE3MzIzNTEzNDY%3D&request=yes&_f=.pdf Thank you very much!


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It's a great talk. I feel like I understand it completely as soon as I hear it. It's a great talk. I feel like I understand it completely as soon as I hear it.   Details Published on 2020-9-20 23:00
 

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It's a great talk. I feel like I understand it completely as soon as I hear it. It's a great talk. I feel like I understand it completely as soon as I hear it.

This post is from FPGA/CPLD
 
 

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