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Could anyone explain the procedure of setting resolution of ov7725? [Copy link]

  1. //Set the image output window//width: output image width, <= 320 //height: output image height, <= 240 //mode: 0, QVGA output mode; 1, VGA output mode//QVGA mode has a wide viewing range but close objects are not very clear, while VGA mode has a small viewing range but close objects are clear void OV7725_Window_Set(u16 width,u16 height,u8 mode) { u8 raw,temp; u16 sx,sy; if(mode) { sx=(640-width)/2; sy=(480-height)/2; SCCB_WR_Reg(COM7,0x06); //Set to VGA mode SCCB_WR_Reg(HSTART,0x23); //Horizontal starting position SCCB_WR_Reg(HSIZE,0xA0); //Horizontal size SCCB_WR_Reg(VSTRT,0x07); //Vertical start position SCCB_WR_Reg(VSIZE,0xF0); //Vertical size SCCB_WR_Reg(HREF,0x00); SCCB_WR_Reg(HOutSize,0xA0); //Output size SCCB_WR_Reg(VOutSize,0xF0); //Output size } else { sx=(320-width)/2; sy=(240-height)/2; SCCB_WR_Reg(COM7,0x46); //Set to QVGA mode SCCB_WR_Reg(HSTART,0x3f); //Horizontal start position SCCB_WR_Reg(HSIZE, 0x50); //Horizontal size SCCB_WR_Reg(VSTRT, 0x03); //Vertical start position SCCB_WR_Reg(VSIZE, 0x78); //Vertical size SCCB_WR_Reg(HREF, 0x00); SCCB_WR_Reg(HOutSize,0x50); //Output size SCCB_WR_Reg(VOutSize,0x78); //Output size} raw=SCCB_RD_Reg(HSTART); temp=raw+(sx>>2);//sx high 8 bits exist in HSTART, low 2 bits exist in HREF[5:4] SCCB_WR_Reg(HSTART,temp); SCCB_WR_Reg(HSIZE,width>>2);//width high 8 bits exist in HSIZE, low 2 bits exist in HREF[1:0] raw=SCCB_RD_Reg(VSTRT); temp=raw+(sy>>1);//sy high 8 bits exist in VSTRT, low 1 bit exists in HREF[6] SCCB_WR_Reg(VSTRT,temp); SCCB_WR_Reg(VSIZE,height>>1);//height high 8 bits exist in VSIZE, low 1 bit exists in HREF[2] raw=SCCB_RD_Reg(HREF); temp=((sy&0x01)<<6)|((sx&0x03)<<4)|((height&0x01)<<2)|(width&0x03)|raw; SCCB_WR_Reg(HREF,temp); SCCB_WR_Reg(HOutSize,width>>2); SCCB_WR_Reg(VOutSize,height>>1); SCCB_RD_Reg(EXHCH); temp = (raw|(width&0x03)|((height&0x01)<<2)); SCCB_WR_Reg(EXHCH,temp); }
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The values of several registers (decimal) in VGA mode 640*480 are as follows: HSTRT = 35 HSIZE = 160 VSTRT = 7 VSIZE = 240 HREF = 0 HOutSize = 160 VOutSize = 240 EXHCH = 0 The values of the registers under 480*240 are as follows: HSTRT = 55 HSIZE = 120 VSTRT = 67 VSIZE = 120 HREF = 0 HOutSize = 120 VOutSize = 120 EXHCH = 0 232)]Is there anyone in the forum who knows why these registers related to resolution should be configured in this way? I have been looking through the manual for a long time but couldn't find it. I have been troubled for several days.

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My understanding is that those are to configure the horizontal and vertical frequency signal delay time, and this time is based on PCLK.  Details Published on 2018-5-29 08:31
 

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The register settings of these cameras are really hard to figure out. There is no clear manual on the official website. I can only try to pass the routine program and it is like that. No one knows why.
This post is from stm32/stm8
 
 

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My understanding is that those are to configure the horizontal and vertical frequency signal delay time, and this time is based on PCLK.
This post is from stm32/stm8
 
 

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huo_hu posted on 2018-5-29 08:27 It is really hard to figure out the register settings of these cameras. There is no clear manual on the official website. I can only try to pass the routine program and it is like that. No one knows why
It is really a pitfall. I have read the manual to pieces and still can't find any introduction about this
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huo_hu posted on 2018-5-29 08:31 My understanding is that those are to configure the delay time of the horizontal and vertical frequency signals, and this time is based on PCLK.
My understanding is similar to yours. I also think that these registers determine which row and column the camera starts to collect
This post is from stm32/stm8
 
 
 

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