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MSP430F149 cc1101 wireless transceiver source program [Copy link]

The microcontroller source program is as follows:

  1. #include <in430.h>
  2. #include <io430.h>
  3. #include "cc1100.h"
  4. #define INT8U unsigned char
  5. #define INT16U unsigned int
  6. unsigned char PaTabel[8] = {0xC0 ,0xC0 ,0xC0 ,0xC0 ,0xC0 ,0xC0 ,0xC0 ,0xC0};
  7. unsigned int TestInt = 0;
  8. const RF_SETTINGS rfSettings =
  9. {
  10. 0x00,
  11. 0x08, // FSCTRL1 Frequency synthesizer control.
  12. 0x00, // FSCTRL0 Frequency synthesizer control.
  13. 0x10, // FREQ2 Frequency control word, high byte.
  14. 0xA7, // FREQ1 Frequency control word, middle byte.
  15. 0x62, // FREQ0 Frequency control word, low byte.
  16. 0x5B, // MDMCFG4 Modem configuration.
  17. 0xF8, // MDMCFG3 Modem configuration.
  18. 0x03, // MDMCFG2 Modem configuration.
  19. 0x22, // MDMCFG1 Modem configuration.
  20. 0xF8, // MDMCFG0 Modem configuration.
  21. 0x00, // CHANNR Channel number.
  22. 0x47, // DEVIATN Modem deviation setting (when FSK modulation is enabled).
  23. 0xB6, // FREND1 Front end RX configuration.
  24. 0x10, // FREND0 Front end RX configuration.
  25. 0x18, // MCSM0 Main Radio Control State Machine configuration.
  26. 0x1D, // FOCCFG Frequency Offset Compensation Configuration.
  27. 0x1C, // BSCFG Bit synchronization Configuration.
  28. 0xC7, // AGCCTRL2AGC control.
  29. 0x00, // AGCCTRL1AGC control.
  30. 0xB2, // AGCCTRL0AGC control.
  31. 0xEA, // FSCAL3 Frequency synthesizer calibration.
  32. 0x2A, // FSCAL2 Frequency synthesizer calibration.
  33. 0x00, // FSCAL1 Frequency synthesizer calibration.
  34. 0x11, // FSCAL0 Frequency synthesizer calibration.
  35. 0x59, // FSTEST Frequency synthesizer calibration.
  36. 0x81, // TEST2 Various test settings.
  37. 0x35, // TEST1 Various test settings.
  38. 0x09, // TEST0 Various test settings.
  39. 0x0B, // IOCFG2 GDO2 output pin configuration.
  40. 0x06, // IOCFG0D GDO0 output pin configuration. Refer to SmartRF?Studio User Manual for detailed pseudo register explanation.
  41. 0x04, // PKTCTRL1Packet automation control.
  42. 0x05, // PKTCTRL0Packet automation control.
  43. 0x01, // ADDR Device address.
  44. 0x0c // PKTLEN Packet length.
  45. };
  46. void delay(unsigned int s)
  47. {
  48. while (s != 0)
  49. {
  50. s--;
  51. }
  52. }
  53. void halWait(unsigned int s)
  54. {
  55. do
  56. {
  57. _NOP();
  58. _NOP();
  59. _NOP();
  60. _NOP();
  61. _NOP();
  62. _NOP();
  63. _NOP();
  64. _NOP();
  65. _NOP();
  66. _NOP();
  67. _NOP();
  68. _NOP();
  69. _NOP();
  70. _NOP();
  71. _NOP();
  72. _NOP();
  73. }
  74. while(--s);
  75. }
  76. void InitSpi(void)
  77. {
  78. CSN_L;
  79. SCK_L;
  80. CSN_H;
  81. }
  82. void halSpiWriteReg(unsigned char addr, unsigned char value)
  83. {
  84. CSN_L;
  85. while (GetMISO);
  86. SpiTxRxByte(addr); //write address
  87. SpiTxRxByte(value); //Write configuration
  88. CSN_H;
  89. }
  90. void halSpiWriteBurstReg(INT8U addr, INT8U *buffer, INT8U count)
  91. {
  92. INT8U i, temp;
  93. temp = addr | WRITE_BURST;
  94. CSN_L;
  95. while (GetMISO);
  96. SpiTxRxByte(temp);
  97. for (i = 0; i < count; i++)
  98. {
  99. SpiTxRxByte(buffer[i]);
  100. }
  101. CSN_H;
  102. }
  103. void halSpiStrobe(INT8U strobe)
  104. {
  105. CSN_L;
  106. while (GetMISO);
  107. SpiTxRxByte(strobe); //write command
  108. CSN_H;
  109. }
  110. INT8U halSpiReadReg(INT8U addr)
  111. {
  112. INT8U temp, value;
  113. temp = addr|READ_SINGLE; //Read register command
  114. CSN_L;
  115. while (GetMISO);
  116. SpiTxRxByte(temp);
  117. value = SpiTxRxByte(0);
  118. CSN_H;
  119. return value;
  120. }
  121. void halSpiReadBurstReg(INT8U addr, INT8U *buffer, INT8U count)
  122. {
  123. INT8U i,temp;
  124. temp = addr | READ_BURST; //Write the configuration register address and read command to be read
  125. CSN_L;
  126. while (GetMISO);
  127. SpiTxRxByte(temp);
  128. for (i = 0; i < count; i++)
  129. {
  130. buffer[i] = SpiTxRxByte(0);
  131. }
  132. CSN_H;
  133. }
  134. INT8U halSpiReadStatus(INT8U addr)
  135. {
  136. INT8U value,temp;
  137. temp = addr | READ_BURST; //Write the address of the status register to be read and write the read command at the same time
  138. CSN_L;
  139. while (GetMISO);
  140. SpiTxRxByte(temp);
  141. value = SpiTxRxByte(0);
  142. CSN_H;
  143. return value;
  144. }
  145. void halRfWriteRfSettings(void)
  146. {
  147. halSpiWriteReg(CCxxx0_FSCTRL0, rfSettings.FSCTRL2);//self-added
  148. // Write register settings
  149. halSpiWriteReg(CCxxx0_FSCTRL1, rfSettings.FSCTRL1);
  150. halSpiWriteReg(CCxxx0_FSCTRL0, rfSettings.FSCTRL0);
  151. halSpiWriteReg(CCxxx0_FREQ2, rfSettings.FREQ2);
  152. halSpiWriteReg(CCxxx0_FREQ1, rfSettings.FREQ1);
  153. halSpiWriteReg(CCxxx0_FREQ0, rfSettings.FREQ0);
  154. halSpiWriteReg(CCxxx0_MDMCFG4, rfSettings.MDMCFG4);
  155. halSpiWriteReg(CCxxx0_MDMCFG3, rfSettings.MDMCFG3);
  156. halSpiWriteReg(CCxxx0_MDMCFG2, rfSettings.MDMCFG2);
  157. halSpiWriteReg(CCxxx0_MDMCFG1, rfSettings.MDMCFG1);
  158. halSpiWriteReg(CCxxx0_MDMCFG0, rfSettings.MDMCFG0);
  159. halSpiWriteReg(CCxxx0_CHANNR, rfSettings.CHANNR);
  160. halSpiWriteReg(CCxxx0_DEVIATN, rfSettings.DEVIATN);
  161. halSpiWriteReg(CCxxx0_FREND1, rfSettings.FREND1);
  162. halSpiWriteReg(CCxxx0_FREND0, rfSettings.FREND0);
  163. halSpiWriteReg(CCxxx0_MCSM0 , rfSettings.MCSM0 );
  164. halSpiWriteReg(CCxxx0_FOCCFG, rfSettings.FOCCFG);
  165. halSpiWriteReg(CCxxx0_BSCFG, rfSettings.BSCFG);
  166. halSpiWriteReg(CCxxx0_AGCCTRL2, rfSettings.AGCCTRL2);
  167. halSpiWriteReg(CCxxx0_AGCCTRL1, rfSettings.AGCCTRL1);
  168. halSpiWriteReg(CCxxx0_AGCCTRL0, rfSettings.AGCCTRL0);
  169. halSpiWriteReg(CCxxx0_FSCAL3, rfSettings.FSCAL3);
  170. halSpiWriteReg(CCxxx0_FSCAL2, rfSettings.FSCAL2);
  171. halSpiWriteReg(CCxxx0_FSCAL1, rfSettings.FSCAL1);
  172. halSpiWriteReg(CCxxx0_FSCAL0, rfSettings.FSCAL0);
  173. halSpiWriteReg(CCxxx0_FSTEST, rfSettings.FSTEST);
  174. halSpiWriteReg(CCxxx0_TEST2, rfSettings.TEST2);
  175. halSpiWriteReg(CCxxx0_TEST1, rfSettings.TEST1);
  176. halSpiWriteReg(CCxxx0_TEST0, rfSettings.TEST0);
  177. halSpiWriteReg(CCxxx0_IOCFG2, rfSettings.IOCFG2);
  178. halSpiWriteReg(CCxxx0_IOCFG0, rfSettings.IOCFG0);
  179. halSpiWriteReg(CCxxx0_PKTCTRL1, rfSettings.PKTCTRL1);
  180. halSpiWriteReg(CCxxx0_PKTCTRL0, rfSettings.PKTCTRL0);
  181. halSpiWriteReg(CCxxx0_ADDR, rfSettings.ADDR);
  182. halSpiWriteReg(CCxxx0_PKTLEN, rfSettings.PKTLEN);
  183. }
  184. void halRfSendPacket(INT8U *txBuffer, INT8U size)
  185. {
  186. halSpiWriteReg(CCxxx0_TXFIFO, size);
  187. halSpiWriteBurstReg(CCxxx0_TXFIFO, txBuffer, size); //Write the data to be sent
  188. halSpiStrobe(CCxxx0_SIDLE); // The solution to GDO0 not jumping on the Internet is not available.
  189. halSpiStrobe(CCxxx0_STX); //Enter the sending mode to send data
  190. // Wait for GDO0 to be set -> sync transmitted
  191. while (!GOD0);
  192. // Wait for GDO0 to be cleared -> end of packet
  193. while (GOD0);
  194. halSpiStrobe(CCxxx0_SFTX);
  195. }
  196. void setRxMode(void)
  197. {
  198. halSpiStrobe(CCxxx0_SRX); //Enter receiving state
  199. }
  200. INT8U halRfReceivePacket(INT8U *rxBuffer, INT8U *length)
  201. {
  202. INT8U status[2];
  203. INT8U packetLength;
  204. INT8U i=(*length)*4; // The specific amount depends on datarate and length
  205. halSpiStrobe(CCxxx0_SRX); //Enter receiving state
  206. halWait(2000);
  207. while (GOD0)
  208. {
  209. halWait(1000);
  210. --i;
  211. if(i<1)
  212. {
  213. return 0;
  214. }
  215. }
  216. if ((halSpiReadStatus(CCxxx0_RXBYTES) & BYTES_IN_RXFIFO)) //If the number of bytes received is not 0
  217. {
  218. packetLength = halSpiReadReg(CCxxx0_RXFIFO); //Read the first byte, which is the length of the frame data
  219. if (packetLength <= *length) //If the required valid data length is less than or equal to the length of the received data packet
  220. {
  221. halSpiReadBurstReg(CCxxx0_RXFIFO, rxBuffer, packetLength); //Read all received data
  222. *length = packetLength; //Change the length of received data to the length of current data
  223. // Read the 2 appended status bytes (status[0] = RSSI, status[1] = LQI)
  224. halSpiReadBurstReg(CCxxx0_RXFIFO, status, 2); //Read out CRC check bit
  225. halSpiStrobe(CCxxx0_SFRX); //Clean the receive buffer
  226. return (status[1] & CRC_OK); //If the verification is successful, return to receive success
  227. }
  228. else
  229. {
  230. *length = packetLength;
  231. halSpiStrobe(CCxxx0_SFRX); //Clean the receive buffer
  232. return 0;
  233. }
  234. }
  235. else
  236. {
  237. return 0;
  238. }
  239. }
  240. unsigned char SpiTxRxByte(unsigned char dat)
  241. {
  242. unsigned char i,temp;
  243. temp = 0;
  244. SCK_L;
  245. for(i=0; i<8; i++)
  246. {
  247. if(dat & 0x80)
  248. {
  249. MOSI_H;
  250. }
  251. else
  252. {
  253. MOSI_L;
  254. }
  255. dat <<= 1;
  256. SCK_H;
  257. delay(20);
  258. temp <<= 1;
  259. if(GetMISO)
  260. {
  261. temp++;
  262. }
  263. SCK_L;
  264. delay(20);
  265. }
  266. return temp;
  267. }
  268. unsigned int RESET_CC1100(void)
  269. {
  270. CSN_L;
  271. while (GetMISO);
  272. unsigned int ret = SpiTxRxByte(CCxxx0_SRES); //Write reset command
  273. while (GetMISO);
  274. CSN_H;
  275. return right;
  276. }
  277. unsigned int POWER_UP_RESET_CC1100(void)
  278. {
  279. CSN_H;
  280. halWait(1);
  281. CSN_L;
  282. halWait(1);
  283. CSN_H;
  284. halWait(41);
  285. unsigned int ret = RESET_CC1100(); //Reset CC1100
  286. return right;
  287. }
This post is from Microcontroller MCU
 

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